v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
G {}
K {}
V {}
S {}
E {}
B 2 900 -620 1700 -330 {flags=graph
y1=-0.214318
y2=1.44454
ypos1=0
ypos2=2
divy=5
subdivy=1
unity=1
x1=2e-12
x2=9e-06
divx=5
subdivx=1
node="SIG_IN
VREF
VCC"
color="12 9 4"
dataset=0
unitx=u
}
B 2 900 -330 1700 -130 {flags=graph
y1=0
y2=1.2
ypos1=0.0499032
ypos2=0.633885
divy=5
subdivy=1
unity=1
x1=2e-12
x2=9e-06
divx=5
subdivx=1
node="CODE;CODE[5],CODE[4],CODE[3],CODE[2],CODE[1],CODE[0]
CK
RST
x1.COMP"
color="7 8 10 4"
dataset=0
unitx=u
digital=1
}
B 2 900 -970 1700 -630 {flags=graph
y1=14.1924
y2=54.9924
ypos1=0
ypos2=2


unity=1
x1=2e-12
x2=9e-06
divx=5
subdivx=1
node="\\"0x12; 18\\"
\\"0x2E; 46\\"
\\"0x33; 51\\"
\\"sig_in 1.2 / 63 *\\""
color="14 14 14 7"
dataset=0
unitx=u
divy=10
subdivy=1}
B 2 620 -100 757 -40 {flags=image
alpha=0.6
[encoded data, 50943 characters]}
P 8 7 620 -700 820 -700 820 -710 860 -700 820 -690 820 -700 620 -700 {}
T {Value of this signal
is equal to adc conversion
CODE[5:0]} 602.5 -792.5 0 0 0.4 0.4 {layer=8}
N 510 -220 540 -220 {
lab=SIG_IN}
N 510 -200 540 -200 {
lab=VREF}
N 510 -180 540 -180 {
lab=CK}
N 510 -160 540 -160 {
lab=RST}
N 270 -720 270 -690 {
lab=VREF}
N 520 -720 520 -690 {
lab=RST}
N 390 -720 390 -690 {
lab=VCC}
N 270 -570 270 -540 {
lab=SIG_IN}
N 520 -570 520 -540 {
lab=CK}
N 390 -570 390 -540 {
lab=VSS}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {lab_pin.sym} 270 -720 0 0 {name=p33 lab=VREF}
C {vsource.sym} 270 -660 0 0 {name=v2 value="'VCC/2'"}
C {lab_pin.sym} 270 -630 0 0 {name=p34 lab=0}
C {simulator_commands.sym} 10 -380 0 0 {name=INTERACTIVE
simulator=ngspice
spice_ignore=0
tclcommand="xschem edit_vi_prop"
xxplace=end
value="
** download the models from:
** https://ptm.asu.edu/modelcard/65nm_bulk.txt
.include models_65nm.txt
.model switch sw vt='VCC/2' vh=0.2 ron=1000 roff=1G
.param VCC=1.2
.option method=GEAR
.measure tran avg1 AVG v(x1.qn) from=1u to=3u 
.measure tran avg2 AVG v(x1.qn) from=4u to=6u
.measure tran avg3 AVG v(x1.qn) from=7u to=9u
.control
  tran 0.2n 9u uic
  write delta_sigma.raw
  set appendwrite
  save all
  op
  write delta_sigma.raw
  quit 0
.endc
"}
C {vsource.sym} 270 -510 0 1 {name=v3 
value="pwl
+ 0.001u 0.34 3u 0.34 
+ 3.001u 0.88 6u 0.88
+ 6.001u 0.97 9u 0.97"}
C {lab_pin.sym} 270 -480 0 0 {name=p1 lab=0}
C {lab_pin.sym} 270 -570 0 0 {name=p2 lab=SIG_IN}
C {vsource.sym} 520 -510 0 0 {name=v1 
value="pulse 0 'VCC' 100n 100p 100p 9.9n 20n" 
xvalue="sin 0.2 1.8 1u 0"
}
C {lab_pin.sym} 520 -480 0 0 {name=p6 lab=0}
C {lab_pin.sym} 520 -570 0 0 {name=p7 lab=CK}
C {vsource.sym} 390 -660 0 0 {name=v5 value='VCC'}
C {lab_pin.sym} 390 -630 0 0 {name=p17 lab=0}
C {lab_pin.sym} 390 -570 0 0 {name=p18 lab=VSS}
C {vsource.sym} 390 -510 0 0 {name=v6 value=0}
C {lab_pin.sym} 390 -480 0 0 {name=p19 lab=0}
C {lab_pin.sym} 520 -720 0 0 {name=p55 lab=RST}
C {vsource.sym} 520 -660 0 0 {name=v7 value="pwl 0 'VCC' 
+ 1u 'VCC' 1.001u 0 3u 0 3.001u 'VCC'
+ 4u 'VCC' 4.001u 0 6u 0 6.001u 'VCC'
+ 7u 'VCC' 7.001u 0 9u 0 9.001u 'VCC'"

}
C {lab_pin.sym} 520 -630 0 0 {name=p56 lab=0}
C {vdd.sym} 390 -720 0 0 {name=l2 lab=VCC}
C {adc.sym} 620 -190 0 0 {name=x1}
C {lab_pin.sym} 700 -220 0 1 {name=p38 lab=CODE[5:0]}
C {lab_pin.sym} 510 -220 0 0 {name=p39 lab=SIG_IN}
C {lab_pin.sym} 510 -200 0 0 {name=p40 lab=VREF}
C {lab_pin.sym} 510 -180 0 0 {name=p41 lab=CK}
C {lab_pin.sym} 510 -160 0 0 {name=p42 lab=RST}
C {spice_probe.sym} 270 -720 0 0 {name=p3 attrs=""}
C {spice_probe.sym} 390 -720 0 0 {name=p4 attrs=""}
C {spice_probe.sym} 270 -570 0 0 {name=p5 attrs=""}
C {spice_probe.sym} 520 -570 0 0 {name=p8 attrs=""}
C {spice_probe.sym} 520 -720 0 0 {name=p9 attrs=""}
C {spice_probe.sym} 700 -220 0 0 {name=p10 attrs=""}
C {launcher.sym} 1270 -90 0 0 {name=h5 
descr="Select arrow and 
Ctrl-Left-Click to load/unload waveforms" 
tclcommand="
xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw tran
"
}
C {launcher.sym} 650 -870 0 0 {name=h1 
descr="Netlist + Simulate
Ctrl-Left-Click" 
tclcommand="xschem netlist; simulate"
}
C {simulator_commands.sym} 150 -380 0 0 {name=BATCH_MODE
simulator=ngspice
spice_ignore=1
tclcommand="xschem edit_vi_prop"
xxplace=end
value="
** download the models from:
** https://ptm.asu.edu/modelcard/65nm_bulk.txt
.include models_65nm.txt
.model switch sw vt='VCC/2' vh=0.2 ron=1000 roff=1G
.param VCC=1.2
.option method=GEAR
.measure tran avg1 AVG v(x1.qn) from=1u to=3u 
.measure tran avg2 AVG v(x1.qn) from=4u to=6u
.measure tran avg3 AVG v(x1.qn) from=7u to=9u
* save all
.tran 0.2n 9u uic
"}
C {launcher.sym} 70 -210 0 0 {name=h2
descr="Swap interactive / batch mode"
tclcommand="proc simswap \{\} \{

  set x [xschem getprop instance INTERACTIVE spice_ignore]
  xschem setprop instance BATCH_MODE spice_ignore $x
  set x [expr \{ !$x\}]
  xschem setprop instance INTERACTIVE spice_ignore $x
\}

simswap

"
}
