v {xschem version=3.4.5 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
G {}
K {}
V {}
S {}
E {}
B 2 1030 -330 1570 -130 {flags=graph
y1=-8.1
y2=44
ypos1=0
ypos2=2
divy=5
subdivy=1
unity=1
x1=3
x2=10

subdivx=8
node="\\"diffout @ 1uA; diffout db20() %0\\"
\\"diffout @ 10uA; diffout db20() %1\\"
\\"diffout @ 100uA; diffout db20() %2\\""
color="6 4 7"

unitx=1
divx=10

logx=1

sim_type=ac
autoload=1}
B 2 1030 -550 1570 -350 {flags=graph
y1=-180
y2=180
ypos1=0
ypos2=2


unity=1
x1=3
x2=10

subdivx=8
node="\\"ph diffout @ 1uA; ph(diffout)%0\\"
\\"phdiffout @10uA; ph(diffout)%1\\"
\\"ph diffout @ 100uA; ph(diffout)%2\\""
color="6 4 7"

unitx=1
divx=10

divy=5
logx=1

sim_type=ac
subdivy=4
autoload=1}
B 2 1430 -620 1567 -560 {flags=image
alpha=0.6
filter="gm convert png:- -transparent black png:-"
image=/home/schippes/sda7/1.png
[encoded data, 45171 characters]}
B 2 1250 -617.5 1388 -555 {flags=image
alpha=0.6
image=/home/schippes/x/xyce.png
[encoded data, 61011 characters]}
T {CMOS DIFFERENTIAL AMPLIFIER
EXAMPLE} 20 -680 0 0 0.4 0.4 {}
T {Feedback
network 
loading} 870 -490 0 0 0.4 0.4 {}
T {gain AC plot at 1uA, 10uA, 100uA bias current} 1030 -120 0 0 0.4 0.4 {layer=5}
T {tcleval([xschem raw info])} 60 -770 0 0 0.3 0.3 {floater=true layer=16}
N 30 -240 30 -210 {lab=VCC}
N 30 -240 60 -240 {lab=VCC}
N 190 -230 190 -180 {lab=GN}
N 190 -180 230 -180 {lab=GN}
N 230 -180 230 -150 {lab=GN}
N 230 -150 410 -150 {lab=GN}
N 450 -220 450 -180 {lab=D}
N 380 -250 400 -250 {lab=0}
N 500 -250 520 -250 {lab=0}
N 450 -220 520 -220 {lab=D}
N 320 -250 340 -250 {lab=PLUS}
N 560 -250 580 -250 {lab=MINUS}
N 520 -400 570 -400 {lab=VCC}
N 330 -400 380 -400 {lab=VCC}
N 420 -400 480 -400 {lab=#net1}
N 420 -400 420 -370 {lab=#net1}
N 380 -370 420 -370 {lab=#net1}
N 380 -370 380 -280 {lab=#net1}
N 520 -330 520 -280 {lab=DIFFOUT}
N 520 -470 520 -430 {lab=VCC}
N 450 -470 520 -470 {lab=VCC}
N 380 -470 380 -430 {lab=VCC}
N 450 -490 450 -470 {lab=VCC}
N 890 -330 900 -330 {lab=DIFFOUT}
N 30 -370 30 -340 {lab=PLUS}
N 30 -370 60 -370 {lab=PLUS}
N 450 -120 450 -90 {lab=0}
N 450 -120 470 -120 {lab=0}
N 470 -150 470 -120 {lab=0}
N 450 -150 470 -150 {lab=0}
N 190 -120 190 -90 {lab=0}
N 170 -120 190 -120 {lab=0}
N 170 -150 170 -120 {lab=0}
N 170 -150 190 -150 {lab=0}
N 830 -660 830 -620 {lab=DIFFOUT_L}
N 830 -560 830 -540 {lab=0}
N 580 -250 580 -230 { lab=MINUS}
N 720 -230 750 -230 { lab=#net2}
N 600 -660 600 -620 {lab=D_L}
N 600 -560 600 -540 {lab=0}
N 790 -470 790 -450 { lab=DIFFOUT_L}
N 790 -390 790 -370 { lab=D_L}
N 830 -420 850 -420 { lab=DIFFOUT}
N 850 -420 850 -330 { lab=DIFFOUT}
N 580 -230 660 -230 { lab=MINUS}
N 750 -230 750 -220 { lab=#net2}
N 750 -160 750 -140 { lab=0}
N 890 -330 890 -250 { lab=DIFFOUT}
N 880 -250 890 -250 { lab=DIFFOUT}
N 750 -250 820 -250 { lab=#net2}
N 750 -220 800 -220 {
lab=#net2}
N 750 -160 800 -160 {
lab=0}
N 380 -220 450 -220 {lab=D}
N 380 -470 450 -470 {lab=VCC}
N 520 -370 520 -330 {lab=DIFFOUT}
N 750 -250 750 -230 { lab=#net2}
N 520 -330 850 -330 {lab=DIFFOUT}
N 850 -330 890 -330 {lab=DIFFOUT}
N 750 -610 790 -610 {
lab=DIFFOUT}
N 750 -570 790 -570 {
lab=0}
N 520 -610 560 -610 {
lab=D}
N 520 -570 560 -570 {
lab=0}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {nmos4.sym} 430 -150 0 0 {name=m1 model=cmosn w=5u l=2u m=1}
C {pmos4.sym} 500 -400 0 0 {name=mtop_2nd model=cmosp w=5u l=2u m=1}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5}
C {lab_pin.sym} 450 -90 0 0 {name=p1 lab=0}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC}
C {nmos4.sym} 210 -150 0 1 {name=m3 model=cmosn w=5u l=2u m=1}
C {lab_pin.sym} 190 -90 0 0 {name=p3 lab=0}
C {isource.sym} 190 -260 0 0 {name=IBIAS value=\{IBIAS\}}
C {lab_pin.sym} 190 -290 0 0 {name=p4 lab=0}
C {nmos4.sym} 360 -250 0 0 {name=m4 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 400 -250 0 1 {name=p5 lab=0}
C {nmos4.sym} 540 -250 0 1 {name=m5 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 500 -250 0 0 {name=p0 lab=0}
C {lab_pin.sym} 570 -400 0 1 {name=p6 lab=VCC}
C {pmos4.sym} 400 -400 0 1 {name=mtop_1st model=cmosp w=5u l=2u m=1}
C {lab_pin.sym} 330 -400 0 0 {name=p7 lab=VCC}
C {lab_pin.sym} 450 -490 0 0 {name=p8 lab=VCC}
C {lab_pin.sym} 320 -250 0 0 {name=p9 lab=PLUS}
C {lab_pin.sym} 580 -240 0 1 {name=p10 lab=MINUS}
C {lab_pin.sym} 900 -330 0 1 {name=p11 lab=DIFFOUT}
C {lab_pin.sym} 190 -200 0 0 {name=p13 lab=GN}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0}
C {vsource.sym} 30 -310 0 0 {name=VPLUS value="dc 2.5"
}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS}
C {lab_pin.sym} 750 -610 0 0 {name=l18 lab=DIFFOUT}
C {lab_pin.sym} 750 -570 0 0 {name=l19 lab=0}
C {lab_pin.sym} 830 -540 0 0 {name=l20 lab=0}
C {lab_pin.sym} 830 -660 0 1 {name=l21 lab=DIFFOUT_L}
C {vcvs.sym} 830 -590 0 0 {name=e1 value=1}
C {lab_pin.sym} 450 -200 0 0 {name=p16 lab=D}
C {lab_pin.sym} 520 -610 0 0 {name=l2 lab=D}
C {lab_pin.sym} 520 -570 0 0 {name=l3 lab=0}
C {lab_pin.sym} 600 -540 0 0 {name=l4 lab=0}
C {lab_pin.sym} 600 -660 0 1 {name=l5 lab=D_L}
C {vcvs.sym} 600 -590 0 0 {name=e2 value=1}
C {nmos4.sym} 810 -420 0 1 {name=m7 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 790 -470 0 0 {name=l6 lab=DIFFOUT_L}
C {lab_pin.sym} 790 -370 0 0 {name=l7 lab=D_L}
C {lab_pin.sym} 790 -420 0 0 {name=p18 lab=0}
C {vsource.sym} 690 -230 3 0 {name=VLOOP value="dc 0 ac 1 0"}
C {launcher.sym} 1040 -580 0 0 {name=h2
descr="View raw file"
tclcommand="textwindow $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw"
}
C {launcher.sym} 1040 -770 0 0 {name=h5 
descr=" Ctrl-Left-Click to load/unload
embedded waveforms" 
tclcommand="xschem raw_read_from_attr ac"
spice_data="
[encoded data, 79980 characters]
AAAAAAAAAAAAAAAAAAAA575tYM1K6L5cvlGUEy9Xv7CghinImN0+0Uwy7dDTTD/iJbvwB1ghP53483tsmy6/"}
C {launcher.sym} 1040 -670 0 0 {name=h1 
descr="tcleval(Select arrow and 
Ctrl key + Left Button-Click to load/unload waveforms
from $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw)" 
tclcommand="
xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw ac
"
}
C {lab_pin.sym} 750 -140 0 0 {name=p12 lab=0}
C {res.sym} 750 -190 0 0 {name=R2
value=10G
m=1}
C {ind.sym} 850 -250 1 0 {name=L1
m=1
value=100k
footprint=1206
device=inductor}
C {capa.sym} 800 -190 0 0 {name=C1
m=1
value=1
footprint=1206
device="ceramic capacitor"}
C {launcher.sym} 1210 -70 0 0 {name=h3
descr="Graph Manual page"
url="https://xschem.sourceforge.io/stefan/xschem_man/graphs.html"}
C {simulator_commands.sym} 180 -560 0 0 {name=COMMANDS
simulator=ngspice
only_toplevel=false 
value=".temp 30

** models are generally not free: you must download
** SPICE models for active devices and put them  into the below 
** referenced file in netlist/simulation directory.
** http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee241_s00/ASSIGNMENTS/TSMC035-n96g-params.txt
.include \\"models_cmos_example.txt\\"

.param IBIAS=1u
.control
save all
op
write test_ac.raw
set appendwrite

ac dec 10 1000 10G
write test_ac.raw
alter IBIAS=10u
ac dec 10 1000 10G
write test_ac.raw
alter IBIAS=100u
ac dec 10 1000 10G
write test_ac.raw

.endc
"}
C {simulator_commands.sym} 10 -560 0 0 {name=COMMANDS1
simulator=xyce
only_toplevel=false 
value=".temp 30

** models are generally not free: you must download
** SPICE models for active devices and put them  into the below 
** referenced file in netlist/simulation directory.
** http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee241_s00/ASSIGNMENTS/TSMC035-n96g-params.txt
.include \\"models_cmos_example.txt\\"

.param IBIAS=10u
.ac dec 10 1000 10G
.print ac format=raw file=test_ac.raw v(*) i(*)
"}
C {launcher.sym} 620 -100 0 0 {name=h4
descr=Backannotate
tclcommand="xschem annotate_op $\{netlist_dir\}/test_ac.raw"
}
