v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"

}
V {}
S {}
E {}
L 15 270 -540 340 -470 {}
L 15 270 -410 340 -470 {}
B 2 1400 -260 1660 -130 {flags=graph
y1=-44
y2=44
divy=4
subdivy=1
x1=0.015305357
x2=0.015599749
divx=8
subdivx=4
dataset=0
unitx=m


color=7
node=tcleval($\{path\}outi)
jpeg_quality=30
hilight_wave=0
xlabmag=1.4
linewidth_mult=1.2
sim_type=tran}
B 2 960 -980 1094 -893 {flags=image alpha=0.7
[encoded data, 46879 characters]
symbol_ignore=true}
B 2 1400 -440 1660 -260 {flags=graph
y1=0
y2=170
divy=4
subdivy=1
x1=0.015305357
x2=0.015599749
divx=8
subdivx=4
dataset=0
unitx=m



color="8 7"
node="tcleval(\\"Xm1 power;vpp $\{path\}outi - i(v.$\{path\}vu) *\\"
\\"Average;vpp $\{path\}outi - i(v.$\{path\}vu) * 200u ravg()\\")"
jpeg_quality=30
xlabmag=1.4
sim_type=tran}
B 2 1400 -620 1660 -440 {flags=graph
y1=-0.078
y2=170
divy=4
subdivy=1
x1=0.015305357
x2=0.015599749
divx=8
subdivx=4
dataset=0
unitx=m

color="8 7"
node="tcleval(Xm2 Power;$\{path\}outi vnn - i(v.$\{path\}vd) *
Average;$\{path\}outi vnn - i(v.$\{path\}vd) * 200u ravg())"
jpeg_quality=30
xlabmag=1.4
sim_type=tran}
B 2 960 -1050 1094 -987 {flags=image
alpha=0.7
image=/home/schippes/x/3.png
[encoded data, 67891 characters]
symbol_ignore=true}
P 4 5 0 -1290 1390 -1290 1390 -130 0 -130 0 -1290 {dash=3}
T {ANALOG AUDIO AMPLIFIER
N-Channel only power stage} 290 -380 0 0 0.5 0.5 {layer=8 symbol_ignore=true}
T {@name} 40 -1350 0 0 0.8 0.8 {}
T {@symname} 1320 -1350 0 1 0.8 0.8 {}
T {( @#0:resolved_net )} 120 -635 0 1 0.2 0.2 {name=p0 layer=15}
T {( @#0:resolved_net )} 120 -585 0 1 0.2 0.2 {name=p1 layer=15}
T {( @#0:resolved_net )} 1360 -665 0 1 0.2 0.2 {name=p5 layer=15}
T {@name} 805 -486.25 2 0 0.2 0.2 {
name=R11}
T {@value} 783.75 -545 2 1 0.2 0.2 {
name=R11}
T {m=@m} 805 -501.25 2 0 0.2 0.2 {
name=R11}
N 180 -590 180 -550 {lab=E9}
N 260 -550 340 -550 {lab=E9}
N 340 -590 340 -550 {lab=E9}
N 1110 -790 1110 -760 {lab=SA}
N 840 -1110 840 -1070 {lab=E4}
N 1110 -680 1110 -660 {lab=OUTI}
N 1110 -600 1110 -560 {lab=#net1}
N 180 -1110 180 -1070 {lab=E1}
N 390 -880 520 -880 {lab=C2}
N 230 -1040 230 -990 {lab=#net2}
N 180 -990 230 -990 {lab=#net2}
N 390 -880 390 -830 {lab=C2}
N 340 -830 390 -830 {lab=C2}
N 180 -1010 180 -990 {lab=#net2}
N 220 -1040 230 -1040 {lab=#net2}
N 340 -850 340 -830 {lab=C2}
N 380 -880 390 -880 {lab=C2}
N 180 -1210 180 -1170 {lab=VBOOST}
N 840 -1210 840 -1170 {lab=VBOOST}
N 180 -1210 690 -1210 {lab=VBOOST}
N 690 -1210 840 -1210 {lab=VBOOST}
N 1110 -1270 1240 -1270 {lab=VPP}
N 840 -1210 1240 -1210 {lab=VBOOST}
N 860 -530 1070 -530 {lab=GB}
N 560 -550 560 -530 {lab=C8}
N 1240 -990 1240 -960 {lab=#net3}
N 560 -670 560 -610 {lab=E8}
N 560 -850 560 -730 {lab=C6}
N 840 -870 840 -850 {lab=GA}
N 690 -900 690 -880 {lab=B1}
N 690 -900 800 -900 {lab=B1}
N 690 -1210 690 -970 {lab=VBOOST}
N 690 -910 690 -900 {lab=B1}
N 260 -550 260 -540 {lab=E9}
N 150 -180 260 -180 {lab=VSS}
N 50 -300 220 -300 {lab=B3}
N 260 -270 260 -240 {lab=E3}
N 150 -240 150 -180 {lab=VSS}
N 50 -220 50 -180 {lab=VSS}
N 50 -180 150 -180 {lab=VSS}
N 690 -690 1110 -690 {lab=OUTI}
N 180 -550 260 -550 {lab=E9}
N 1110 -700 1110 -690 {lab=OUTI}
N 860 -470 1110 -470 {lab=SB}
N 860 -790 1110 -790 {lab=SA}
N 1240 -1210 1240 -1050 {lab=VBOOST}
N 1110 -500 1110 -470 {lab=SB}
N 1110 -820 1110 -790 {lab=SA}
N 860 -850 1070 -850 {lab=GA}
N 340 -830 340 -780 {lab=C2}
N 340 -720 340 -650 {lab=C9}
N 220 -720 340 -720 {lab=C9}
N 180 -690 180 -650 {lab=C5}
N 1330 -680 1390 -680 {lab=OUT}
N 1110 -680 1240 -680 {lab=OUTI}
N 1110 -690 1110 -680 {lab=OUTI}
N 340 -950 340 -910 {lab=#net4}
N 560 -950 560 -910 {lab=#net5}
N 560 -1110 560 -1010 {lab=E6}
N 340 -1110 340 -1010 {lab=E2}
N 260 -360 260 -330 {lab=C3}
N 730 -530 770 -530 {lab=#net6}
N 560 -530 670 -530 {lab=C8}
N 690 -740 690 -690 {lab=OUTI}
N 690 -820 690 -800 {lab=#net7}
N 180 -930 180 -750 {lab=C7}
N 840 -950 840 -930 {lab=E11}
N 1240 -900 1240 -680 {lab=OUTI}
N 860 -850 860 -840 {lab=GA}
N 860 -800 860 -790 {lab=SA}
N 860 -530 860 -520 {lab=GB}
N 860 -480 860 -470 {lab=SB}
N 1240 -680 1270 -680 {lab=OUTI}
N 830 -530 860 -530 {lab=GB}
N 840 -850 860 -850 {lab=GA}
N 340 -1270 340 -1170 { lab=VPP}
N 560 -1270 560 -1170 { lab=VPP}
N 0 -1270 340 -1270 {lab=VPP}
N 340 -1270 560 -1270 {lab=VPP}
N 1110 -1270 1110 -880 { lab=VPP}
N 560 -1270 1110 -1270 {lab=VPP}
N 230 -1040 800 -1040 { lab=#net2}
N 0 -180 50 -180 {
lab=VSS}
N 0 -140 1110 -140 {
lab=VNN}
N 1110 -410 1110 -140 {lab=VNN}
N 0 -620 140 -620 {
lab=PLUS}
N 0 -570 400 -570 {
lab=MINUS}
N 400 -620 400 -570 {
lab=MINUS}
N 380 -620 400 -620 {
lab=MINUS}
N 150 -400 150 -360 {
lab=VPP}
N 50 -300 50 -280 {
lab=B3}
C {ipin.sym} 0 -620 0 0 {name=p0 lab=PLUS}
C {ipin.sym} 0 -140 0 0 {name=p3 lab=VNN}
C {nmos3.sym} 1090 -530 0 0 {name=xm2 model=irf540 m=1
program=evince
url="https://www.vishay.com/docs/91021/irf540.pdf"
}
C {res.sym} 960 -500 0 1 {name=R7 m=1 value=320}
C {nmos3.sym} 1090 -850 0 0 {name=xm1 model=irf540 m=1
program=evince
url="https://www.vishay.com/docs/91021/irf540.pdf"}
C {res.sym} 960 -820 0 1 {name=R0 m=1 value=320}
C {lab_wire.sym} 880 -530 0 0 {name=l8 lab=GB}
C {res.sym} 340 -1140 0 1 {name=R2 m=1 value=50}
C {res.sym} 180 -1140 0 1 {name=R3 m=1 value=50}
C {lab_pin.sym} 340 -1170 0 0 {name=p10 lab=VPP}
C {npn.sym} 160 -620 0 0 {name=Q5 model=q2n2222 area=1}
C {pnp.sym} 820 -1040 0 0 {name=Q4 model=q2n2907p area=1}
C {res.sym} 840 -1140 0 1 {name=R9 m=1 value=50}
C {pnp.sym} 540 -880 0 0 {name=Q6 model=q2n2907p area=1}
C {res.sym} 560 -1140 0 1 {name=R4 m=1 value=50}
C {lab_pin.sym} 180 -670 0 0 {name=p15 lab=C5}
C {lab_pin.sym} 340 -670 0 1 {name=p16 lab=C9}
C {lab_pin.sym} 180 -1090 0 0 {name=p17 lab=E1}
C {lab_pin.sym} 560 -1170 0 0 {name=p25 lab=VPP}
C {lab_pin.sym} 340 -1090 0 1 {name=p23 lab=E2}
C {lab_pin.sym} 560 -1070 0 1 {name=p28 lab=E6}
C {lab_pin.sym} 840 -1090 0 0 {name=p29 lab=E4}
C {lab_pin.sym} 180 -1210 0 0 {name=p34 lab=VBOOST}
C {ammeter.sym} 1110 -630 0 0 {name=vd}
C {ammeter.sym} 1110 -730 0 0 {name=vu}
C {pnp.sym} 200 -1040 0 1 {name=Q1 model=q2n2907p area=1}
C {pnp.sym} 360 -880 0 1 {name=Q2 model=q2n2907p area=1}
C {npn.sym} 360 -620 0 1 {name=Q9 model=q2n2222 area=1}
C {lab_pin.sym} 560 -760 0 0 {name=p9 lab=C6}
C {code.sym} 970 -350 0 0 {name=STIMULI
only_toplevel=true
value=".option PARHIER=LOCAL RUNLVL=6 post MODMONTE=1 warn maxwarn=6000
.option sampling_method = SRS ingold=1
.option method=gear
.option savecurrents
.temp 30



vvss vss 0 dc 0 
vvpp vpp 0 dc 50
vvnn vnn 0 dc -50

rfb1 vpp minus 100k
rfb2 out minus 100k
rfb3 minus vdc '100k/43'


vvdc vdc 0 dc 21.3
eref vref 0 plus vdc 45

vplus plus vdc dc 0

evboost vboost 0 vol='v(out)>=40 ? v(out)+10 : 50'
rload out 0 4

** models are generally not free: you must download
** SPICE models for active devices and put them  into the below 
** referenced file in simulation directory.
.include \\"models_poweramp.txt\\"
.dc vplus '-1.5' '1.5' 0.1
.save all
.op
*.probe dc v(plus,vdc)
"}
C {lab_wire.sym} 920 -850 0 0 {name=l1 lab=GA}
C {res.sym} 800 -530 1 1 {name=R11 m=1 value=1000
hide_texts=true}
C {pnp.sym} 540 -580 0 0 {name=Q8 model=q2n2907p area=1}
C {capa.sym} 1240 -1020 0 0 {name=C12 m=1 value="40u"}
C {diode.sym} 920 -1240 0 0 {name=D0 model=d1n4148 area=1
url="http://pdf.datasheetcatalog.com/datasheet/bytes/1N5406.pdf"}
C {res.sym} 1240 -930 0 1 {name=R18 m=1 value=200}
C {zener.sym} 1240 -1240 0 0 {name=D1 model=d1n758 area=1
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf"}
C {res.sym} 690 -850 0 1 {name=R14 m=1 value=4k}
C {pnp.sym} 820 -900 0 0 {name=Q11 model=q2n2907p area=1}
C {res.sym} 690 -940 0 1 {name=R15 m=1 value=4k}
C {res.sym} 260 -510 0 1 {name=R5 m=1 value=40}
C {res.sym} 260 -450 0 1 {name=R6 m=1 value=40}
C {zener.sym} 150 -270 2 0 {name=D2 model=1N746 area=1
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf"
}
C {npn.sym} 240 -300 0 0 {name=Q3 model=q2n2222 area=1}
C {res.sym} 150 -330 0 1 {name=R1 m=1 value=7k}
C {lab_pin.sym} 150 -400 0 0 {name=p7 lab=VPP}
C {res.sym} 260 -210 0 1 {name=R10 m=1 value=110}
C {capa.sym} 50 -250 0 0 {name=C3 m=1 value=100n}
C {res.sym} 560 -700 0 1 {name=R12 m=1 value=400}
C {lab_pin.sym} 690 -890 0 0 {name=p12 lab=B1}
C {lab_pin.sym} 340 -550 0 1 {name=p13 lab=E9}
C {lab_pin.sym} 560 -530 0 0 {name=p19 lab=C8}
C {lab_pin.sym} 560 -650 0 1 {name=p20 lab=E8}
C {lab_pin.sym} 840 -940 0 0 {name=p21 lab=E11}
C {lab_pin.sym} 260 -260 0 1 {name=p22 lab=E3}
C {lab_pin.sym} 260 -350 0 0 {name=p26 lab=C3}
C {lab_pin.sym} 50 -300 0 0 {name=p30 lab=B3}
C {lab_pin.sym} 520 -580 0 0 {name=p33 lab=VSS}
C {res.sym} 340 -750 0 1 {name=R13 m=1 value=300}
C {npn.sym} 200 -720 0 1 {name=Q7 model=q2n2222 area=1}
C {lab_pin.sym} 180 -780 0 0 {name=p8 lab=C7}
C {lab_pin.sym} 340 -800 0 1 {name=p31 lab=C2}
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan Schippers"}
C {lab_pin.sym} 860 -790 0 0 {name=p32 lab=SA}
C {ammeter.sym} 1110 -440 0 0 {name=v0}
C {lab_pin.sym} 860 -470 0 0 {name=p35 lab=SB}
C {ammeter.sym} 560 -980 0 0 {name=v1}
C {ammeter.sym} 340 -980 0 0 {name=v2}
C {ammeter.sym} 260 -390 0 0 {name=v3}
C {ammeter.sym} 700 -530 3 0 {name=v4}
C {ammeter.sym} 690 -770 0 0 {name=v5}
C {ammeter.sym} 180 -960 0 1 {name=v6}
C {ammeter.sym} 840 -980 0 0 {name=v7}
C {spice_probe_vdiff.sym} 860 -500 0 0 {name=p37 }
C {spice_probe_vdiff.sym} 860 -820 0 0 {name=p38 voltage=3.68}
C {ammeter.sym} 1300 -680 3 0 {name=v8}
C {opin.sym} 1390 -680 0 0 {name=p5 lab=OUT}
C {ipin.sym} 0 -570 0 0 {name=p1 lab=MINUS}
C {ipin.sym} 0 -180 0 0 {name=p4 lab=VSS}
C {launcher.sym} 510 -420 0 0 {name=h2
descr="Ctrl-Click
Clear all probes" 
tclcommand="
    xschem push_undo
    xschem set no_undo 1
    xschem set no_draw 1
 
    set lastinst [xschem get instances]
    for \{ set i 0 \} \{ $i < $lastinst \} \{incr i \} \{
      set type [xschem getprop instance $i cell::type]
      if \{ [regexp \{(^|/)probe$\} $type ] \} \{
        xschem setprop $i voltage fast
      \}
      if \{ [regexp \{current_probe$\} $type ] \} \{
        xschem setprop $i current fast
      \}
      if \{ [regexp \{differential_probe$\} $type ] \} \{
        xschem setprop $i voltage fast
      \}
    \}
    xschem set no_undo 0
    xschem set no_draw 0
    xschem redraw
"
}
C {ngspice_get_expr.sym} 800 -1090 0 1 {name=r8 
node="[format %.4g [expr [ngspice::get_voltage e4] - [ngspice::get_voltage c7]]]"
descr = veb
}
C {ngspice_get_expr.sym} 880 -1070 0 0 {name=r16 
node="[format %.4g [expr [ngspice::get_current \{q4[ic]\}] / [ngspice::get_current \{q4[ib]\}] ] ]"
descr = beta
}
C {ngspice_get_expr.sym} 860 -1010 0 0 {name=r17 
node="[format %.4g [expr ([ngspice::get_voltage e4] - [ngspice::get_voltage e11]) * [ngspice::get_current \{q4[ic]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 800 -1060 0 1 {name=r23 
node="[ngspice::get_current \{q4[ib]\}]"
descr = Ib
}
C {ngspice_get_expr.sym} 580 -550 0 0 {name=r24 
node="[format %.4g [expr ([ngspice::get_voltage e8] - [ngspice::get_voltage c8]) * [ngspice::get_current \{q8[ic]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 240 -300 0 1 {name=r26 
node="[format %.4g [expr [ngspice::get_current \{q3[ic]\}] / [ngspice::get_current \{q3[ib]\}] ] ]"
descr = beta
}
C {ngspice_get_expr.sym} 860 -870 0 0 {name=r27 
node="[format %.4g [expr ([ngspice::get_voltage e11] - [ngspice::get_voltage ga]) * [ngspice::get_current \{q11[ic]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 1000 -800 0 0 {name=r28 
node="[to_eng [ngspice::get_current \{r0[i]\}]]" 
descr = current
}
C {ngspice_get_expr.sym} 300 -290 2 1 {name=r29 
node="[format %.4g [expr ([ngspice::get_voltage c3] - [ngspice::get_voltage e3]) * [ngspice::get_current \{q3[ic]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 300 -260 2 1 {name=r30 
node="[format %.4g [expr [ngspice::get_voltage b3] - [ngspice::get_voltage e3]]]"
descr = vbe
}
C {ngspice_get_expr.sym} 340 -470 0 0 {name=r31 
node="[format %.4g [expr ([ngspice::get_voltage e9] - [ngspice::get_voltage c3]) * [ngspice::get_current \{r5[i]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 570 -910 0 0 {name=r32 
node="[format %.4g [expr ([ngspice::get_voltage e6] - [ngspice::get_voltage c6]) * [ngspice::get_current \{q6[ic]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 130 -690 0 1 {name=r33 
node="[format %.4g [expr ([ngspice::get_voltage c7] - [ngspice::get_voltage c5]) * [ngspice::get_current \{q7[ic]\}]]]"
descr = power
}
C {ngspice_get_expr.sym} 200 -590 0 0 {name=r34 
node="[format %.4g [expr ([ngspice::get_voltage c5] - [ngspice::get_voltage e9]) * [ngspice::get_current \{q5[ic]\}]]]"
descr = power
}
C {ngspice_get_expr.sym} 320 -590 0 1 {name=r35 
node="[format %.4g [expr ([ngspice::get_voltage c9] - [ngspice::get_voltage e9]) * [ngspice::get_current \{q9[ic]\}]]]"
descr = power
}
C {ngspice_get_expr.sym} 330 -850 0 1 {name=r36 
node="[format %.4g [expr [ngspice::get_current \{q2[ic]\}] / [ngspice::get_current \{q2[ib]\}] ] ]"
descr = beta
}
C {ngspice_get_expr.sym} 140 -350 0 1 {name=r42 
node="[format %.4g [expr ([ngspice::get_node v(vpp)] - [ngspice::get_voltage b3]) * [ngspice::get_current \{r1[i]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 1130 -830 2 1 {name=r43 
node="[format %.4g [expr \{([ngspice::get_node v(vpp)] - [ngspice::get_voltage outi]) * [ngspice::get_current vu]\}]] W"
descr = power
}
C {lab_wire.sym} 910 -690 0 1 {name=l40 lab=OUTI}
C {ngspice_get_expr.sym} 1130 -510 2 1 {name=r46 
node="[format %.4g [expr \{([ngspice::get_voltage outi] - [ngspice::get_node v(vnn)]) * [ngspice::get_current vd]\}]] W"
descr = power
}
C {ngspice_get_expr.sym} 150 -250 2 0 {name=r47 
node="[format %.4g [expr -[ngspice::get_voltage b3] * [ngspice::get_current \{d2[id]\}]]] W"
descr = power
}
C {launcher.sym} 760 -260 0 0 {name=h3
descr="Load file into gaw" 
comment="
  This launcher gets raw filename from current schematic using 'xschem get schname'
  and stripping off path and suffix.  It then loads raw file into gaw.
  This allow to use it in any schematic without changes.
"
tclcommand="
set rawfile [file tail [file rootname [xschem get schname]]].raw
gaw_cmd \\"tabledel $rawfile
load $netlist_dir/$rawfile
table_set $rawfile\\"
unset rawfile"
}
C {spice_probe.sym} 1010 -850 0 0 {name=p40  voltage=3.543}
C {spice_probe.sym} 1000 -530 0 0 {name=p56  voltage=-46.18}
C {spice_probe.sym} 420 -880 0 0 {name=p57 voltage=48.06}
C {spice_probe.sym} 280 -1040 0 0 {name=p58  voltage=47.27}
C {spice_probe.sym} 180 -810 0 0 {name=p59  voltage=47.27}
C {spice_probe.sym} 1020 -1210 0 0 {name=p62  voltage=49.04}
C {launcher.sym} 760 -300 0 0 {name=h1
descr=Backannotate
tclcommand="xschem annotate_op"}
C {launcher.sym} 760 -340 0 0 {name=h4
descr="View Raw file" 
tclcommand="textwindow $netlist_dir/[file tail [file rootname [ xschem get schname 0 ] ] ].raw"
}
C {spice_probe.sym} 790 -690 0 0 {name=p60 analysis=tran voltage=-0.1364}
C {ipin.sym} 0 -1270 0 0 {name=p11 lab=VPP}
C {ngspice_get_expr.sym} 1130 -550 0 0 {name=r19 
node="[ngspice::get_current \{xm2.rd[i]\}]" 
descr = current
}
C {ngspice_get_expr.sym} 1130 -860 0 0 {name=r22 
node="[ngspice::get_current \{xm1.rd[i]\}]" 
descr = current
}
C {ngspice_get_expr.sym} 610 -830 0 1 {name=r20 
node="[format %.4g [expr [ngspice::get_current \{q6[ic]\}] / [ngspice::get_current \{q6[ib]\}] ] ]"
descr = beta
}
C {ngspice_get_expr.sym} 130 -730 0 1 {name=r21 
node="[format %.4g [expr [ngspice::get_current \{q7[ic]\}] / [ngspice::get_current \{q7[ib]\}] ] ]"
descr = beta
}
C {launcher.sym} 460 -190 0 0 {name=h5
descr=hi_current
tclcommand="
set incr_hilight 0
foreach \{n s t\} [xschem instance_list] \{
  if \{$t == \{label\} || $t == \{ipin\} || $t == \{opin\} || $t == \{iopin\}\} \{continue\}
  set curr 0
  if \{$t == \{resistor\} || $t == \{ammeter\} \} \{
    set curr [expr \{ abs([from_eng [xschem translate $n \{@spice_get_current\}]])\}]
  \} elseif \{$t == \{pnp\}  || $t == \{npn\}\} \{
    set curr [expr \{abs([ngspice::get_current $n\\\\\\[ic\\\\\\]])\}]
  \} elseif \{$t == \{nmos\}\} \{
    set curr [expr \{abs([ngspice::get_current $n.rd\\\\\\[i\\\\\\]])\}]
  \} else \{continue\}
  if \{$curr > 0.02\} \{
    xschem set hilight_color 11
    xschem hilight_instname $n fast
  \} elseif \{$curr > 0.01\} \{
    xschem set hilight_color 0
    xschem hilight_instname $n fast
  \} else \{
    xschem set hilight_color 4
    xschem hilight_instname $n fast
  \}
\}
xschem redraw

"
}
