// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain.
// SPDX-FileCopyrightText: 2020 Marco Widmer
// SPDX-License-Identifier: CC0-1.0

`verilator_config

split_var -module "barshift_1d_unpacked" -var "tmp"