// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2025 by Antmicro.
// SPDX-License-Identifier: CC0-1.0

`verilator_config
`ifdef WORKERS
hier_workers -module "Test" -workers `WORKERS
hier_workers -module "Check" -workers `WORKERS
`endif