Commit Graph

3901 Commits

Author SHA1 Message Date
Ryszard Rozak 3d3462b209
Support disabling a fork from within that fork (#6314) 2025-08-20 12:21:07 -04:00
Igor Zaworski 11667160f2
Fix static vars under member select (#6313) 2025-08-20 11:23:16 -04:00
Ryszard Rozak 95c8b7bb00
Support separate coverage counters for toggles 0->1 and 1->0 (#6086) 2025-08-20 07:31:04 -04:00
Geza Lore 636a6b8cd2
Optimize complex combinational logic in DFG (#6298)
This patch adds DfgLogic, which is a vertex that represents a whole,
arbitrarily complex combinational AstAlways or AstAssignW in the
DfgGraph.

Implementing this requires computing the variables live at entry to the
AstAlways (variables read by the block), so there is a new
ControlFlowGraph data structure and a classical data-flow analysis based
live variable analysis to do that at the variable level (as opposed to
bit/element level).

The actual CFG construction and live variable analysis is best effort,
and might fail for currently unhandled constructs or data types. This
can be extended later.

V3DfgAstToDfg is changed to convert the Ast into an initial DfgGraph
containing only DfgLogic, DfgVertexSplice and DfgVertexVar vertices.

The DfgLogic are then subsequently synthesized into primitive operations
by the new V3DfgSynthesize pass, which is a combination of the old
V3DfgAstToDfg conversion and new code to handle AstAlways blocks with
complex flow control.

V3DfgSynthesize by default will synthesize roughly the same constructs
as V3DfgAstToDfg used to handle before, plus any logic that is part of a
combinational cycle within the DfgGraph. This enables breaking up these
cycles, for which there are extensions to V3DfgBreakCycles in this patch
as well. V3DfgSynthesize will then delete all non synthesized or non
synthesizable DfgLogic vertices and the rest of the Dfg pipeline is
identical, with minor changes to adjust for the changed representation.

Because with this change we can now eliminate many more UNOPTFLAT, DFG
has been disabled in all the tests that specifically target testing the
scheduling and reporting of circular combinational logic.
2025-08-19 15:06:38 +01:00
Geza Lore 0bf9fc270f
Iternals: Remove AstAssignPre/AstAssignPost (#6307)
Replace with AstAlwaysPre/AstAlwaysPost with AstAssign under them.

Step towards #6280
2025-08-19 09:27:59 +01:00
Wilson Snyder c90f9e53b7
Add ALWNEVER warning, for `always @*` that never execute (#6291) (#6303) 2025-08-18 12:00:53 -04:00
Artur Bieniek 53c59e7ac7
Fix referencing module variables above classes (#6304)
Signed-off-by: Artur Bieniek <abieniek@internships.antmicro.com>
2025-08-18 08:51:25 -04:00
Wilson Snyder 88046c8063 Internals: Rename AstSenTree pointers to sentreep. No functional change intended except JSON. 2025-08-17 19:14:34 -04:00
Wilson Snyder eaecdf7477 Tests: Improve check for member brace initialization. 2025-08-17 14:40:10 -04:00
Geza Lore f6edf26eb2
Fix hierarchical NBAs (#6286) (#6300)
NBAs targeting a variable in a different scope are now allocated
temporary variables for captured values in the scope of the NBA, not the
scope of the target variable.

Fixes #6286
2025-08-17 19:35:40 +01:00
Wilson Snyder b14539569f Internals: Check and enforce member brace initialization. No functional change intended 2025-08-17 13:20:52 -04:00
Wilson Snyder 7126293086 Support enum.next with a parameter 2025-08-16 21:06:35 -04:00
Wilson Snyder 48a12fb0f4 Document and test `+verilator+rand+reset+2` usage (#6285 partial) 2025-08-16 11:47:19 -04:00
Wilson Snyder 340d1aff4a Tests: Cleanup to favor '--binary'. No test change intended. 2025-08-16 09:26:42 -04:00
Geza Lore d273e2cbd0 Internals: Do not astgen useless Dfg vertex subtypes 2025-08-15 20:06:58 +01:00
Geza Lore 9c11f5e05d Fix DFG circular driver tracing 2025-08-15 10:20:20 +01:00
Mateusz Gancarz e753480b19
Fix no matching function calls for randomized `VlWide` in unpacked and dynamic arrays (#6290) 2025-08-14 05:19:33 -07:00
Wilson Snyder 047a12cc62 Fix variables hiding package imports (#6289). 2025-08-13 18:05:37 -04:00
Wilson Snyder 60cbbf0ec1 Add error on mismatching prototypes (#6207). 2025-08-11 19:50:47 -04:00
Geza Lore 762c5f573c Improve DFG to enable breaking more combinational cycles 2025-08-11 09:44:31 +01:00
Wilson Snyder e6e52dd60a Tests: Fix t_constraint_nosolver_bad.py (#6273) 2025-08-10 08:43:04 -04:00
Wilson Snyder eb80db9397 Clarify extern error message 2025-08-10 08:38:26 -04:00
Wilson Snyder 641dd756c0 Add check for mis-assignment of dynamic/automatics per IEEE 2025-08-10 07:23:28 -04:00
Geza Lore d28436dccc
Fix stray ']' in Verilog code output for non-constant select (#6277) 2025-08-09 14:59:58 +01:00
Wilson Snyder 3ca1c9b6dd Internals: Fix and enforce brace new constructors. No functional change intended. 2025-08-08 18:21:12 -04:00
Geza Lore 16d32cdd4a
Internals: Refactor Ast to Dfg conversion for reusability. (#6276)
This is mainly code motion, with minimal algorithmic changes to
facilitate reusing parts in future code. No functional change intended.
2025-08-08 22:53:12 +01:00
Wilson Snyder d1f851e1e1 Internals: Optimize empty 'if' into StmtExpr 2025-08-08 05:10:40 -04:00
Wilson Snyder 6a225d5d00 Internals: Remove AstSysFuncAsTask 2025-08-08 05:09:54 -04:00
Todd Strader 6bd6663dc9
Fix spurious VPI value change callbacks (#6274) 2025-08-07 16:37:33 +01:00
Artur Bieniek 5b7188fcaf
Fix same variable on the RHS forced to two different LHSs. (#6269) 2025-08-06 17:37:00 -04:00
github action dc049fdd74 Apply 'make format' 2025-08-06 21:30:37 +00:00
Michael Bedford Taylor 218659f4e8
Support parameter resolution of 1D unpacked array slices (#6257) (#6268) 2025-08-06 17:29:40 -04:00
Igor Zaworski 6c1cfc68cf
Fix dynamic cast purity (#6267)
Signed-off-by: Igor Zaworski <izaworski@internships.antmicro.com>
2025-08-06 07:09:44 -04:00
Wilson Snyder c005486acf Support by ignoring delay2 on UDPs 2025-08-05 17:34:42 -04:00
Wilson Snyder 6467351752 Add error on class 'function static'. 2025-08-05 17:12:00 -04:00
Wilson Snyder 870c398094 Fix incorrect Non-ANSI I/O declaration conflict error (#6258) broke with #bd1ac038 2025-08-05 16:33:28 -04:00
Geza Lore 86c56e8e14 Fix true cycle detection in DFG 2025-08-05 15:04:07 +01:00
Geza Lore 78c9e7773a
Allow more variable removal in scoped DFG (#6260) 2025-08-05 11:18:33 +01:00
Ryszard Rozak 7d2b6bd921
Internals: Optimize updates of Vtogcov signals. No functional change intended. (#6110) 2025-08-04 13:29:56 +01:00
Wilson Snyder 52ac3b3a0d Add error on too many pattern members for structure 2025-08-03 17:26:51 -04:00
Wilson Snyder f106c1eaec Fix genvar check to be more strict about generate-for usage only 2025-08-03 16:57:12 -04:00
Wilson Snyder 309129ebcf Add PARAMNODEFAULT error, for parameters without defaults. 2025-08-03 15:27:37 -04:00
Geza Lore deed20fb78
Fix partial DFG conversion of concat assignments (#6255)
When we had a `{a, b} = ...`, and the DFG conversion of `a = ...`
succeeded, but `b = ...` failed, we still used to include `a = ...` in
the DFG, which then caused a spurious multi-driver error for `a` on
a subsequent DFG pass, as the original `{a, b} = ...` was still present
in the Ast, but we also had the extra `a = ...` from converting out of
DFG on the previous pass.

In this patch we only convert assignments with a concatenation on the
LHS, if all target LValues can be converted into DFG.

This is the proper fix for #4231
2025-08-03 14:52:20 +01:00
Wilson Snyder 36577bb549 Add check for missing 'parameter' on implicit types 2025-08-02 17:02:45 -04:00
Wilson Snyder de9671d4a3 Tests: uvm_regex.cc from upstream has clang warnings 2025-08-02 15:03:09 -04:00
Wilson Snyder 12355270b3 Tests: Add uvm_dpi 2025-08-02 13:50:16 -04:00
Ryszard Rozak f9bdab65f0
Fix coverage of variables of complex types (#6250) 2025-08-01 13:24:18 +02:00
Szymon Gizler 61f4c97f40
Support unassigned virtual interfaces (#5265) (#6245) 2025-08-01 12:39:13 +02:00
Rodrigo Batista de Moraes d0f0919830
Fix write of 0 in '%c' (#6248) (#6249) 2025-08-01 07:54:18 +02:00
Wilson Snyder bd1ac03828 Add I/O versus data declaration checking. 2025-07-31 18:38:50 -04:00