luke
/
verilator
mirror of https://github.com/verilator/verilator.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
8,367 Commits 2 Branches 166 Tags 175 MiB
Commit Graph

1 Commits

Author SHA1 Message Date
Krzysztof Bieganski 701fa5438a
Fix output clockvar overwriting signal (#5320) (#5347) 
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2024-08-08 21:48:25 +01:00