323c96f42f
Add -Wwarn-style, -Wno-style, and DEFPARAM warnings
2010-12-25 15:13:56 -05:00
7dee344ea9
Add limited support for VPI access to public signals, see docs.
2010-12-25 14:39:41 -05:00
d6ac5e5001
Support ++,--,+= etc as standalone statements.
2010-12-07 20:18:47 -05:00
d13e6c73db
When running with VERILATOR_ROOT, optionally find binaries under bin.
2010-12-07 11:43:43 -05:00
cfd07ccd34
Suppress WIDTH warnings when adding/subtracting 1'b1.
2010-12-02 14:00:43 -05:00
eeb8fc2626
Add -F option to read relative option files, bug297.
2010-11-03 07:21:34 -04:00
3d1baf3f2f
Version bump
2010-11-02 21:11:02 -04:00
56c7c1bcc8
Add warning when directory contains spaces, msg378
2010-10-28 09:51:36 -04:00
f88e57ddb8
Fix DPI export name not found, msg369.
2010-10-22 13:10:31 -04:00
9d98e012e4
Fix segfault on SystemVerilog "output wire foo=0", bug291.
2010-10-04 07:48:09 -04:00
d305a774f0
Fix wrong filename on include file errors, bug289
2010-09-28 09:33:59 -04:00
ed2fbd8f25
Version bump
2010-09-20 15:46:17 -04:00
42199bc8e5
Fix preprocessor `` of existing base define, bug283.
2010-09-20 15:20:16 -04:00
aba25aab19
On core dump, print debug suggestions.
2010-09-20 09:21:29 -04:00
f99bd33f91
Support tracing/coverage of underscore signals, bug280.
2010-08-29 19:28:46 -04:00
f4908a9758
Increase define recursions before error
2010-08-10 11:18:53 -04:00
5e4ca4b76a
Version bump
2010-07-10 18:41:23 -04:00
1e938d0e90
Update preprocessor to match next Verilog-Perl version.
...
Fix preprocessor preservation of newlines across macro substitutions.
Fix preprocessor stringification of nested macros.
Fix preprocessor whitespace on define arguments
2010-07-10 18:30:16 -04:00
a320c4584e
Fix do {...} while() not requiring final semicolon.
2010-07-07 19:15:51 -04:00
06967c0c46
Fix some constant parameter functions causing crash, bug253.
2010-05-25 19:37:45 -04:00
44b6c371db
Version bump
2010-05-01 14:18:56 -04:00
00970be996
Fix bit reductions on multi-packed dimensions, bug227/patch0004.
2010-04-22 09:40:53 -04:00
aca4ab015f
Fix removing if assigned to unused var, bug248.
2010-04-19 19:38:22 -04:00
ed17581f92
Fix loop unroller out of memory; change --unroll-stmts.
2010-04-17 08:01:22 -04:00
ef51de72c9
Fix word size to match uint64_t on -m64 systems, bug238.
2010-04-09 21:51:15 -04:00
2525b3fb05
Fix bit reductions on multi-packed dimensions, bug227
...
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
2010-04-09 21:05:46 -04:00
83fff41312
Fix installing data files as non-executable, bug168.
2010-04-09 20:21:00 -04:00
f8eabbc100
From Verilog-Perl: Fix parsing single files > 2GB.
2010-04-06 20:20:44 -04:00
bc31b5d27a
Commentary
2010-04-05 20:08:07 -04:00
936738b750
Add /*verilator public_flat_rw*/ for timing-specific public access.
2010-04-05 20:01:17 -04:00
7c3048ab9c
Report errors when extra underscores used in meta-comments.
2010-03-24 22:08:59 -04:00
495585830d
Fix trace files with empty modules crashing some viewers.
2010-03-22 18:38:24 -04:00
6715cb9880
Improve error handling on slices of arrays, bug226.
2010-03-20 21:29:16 -04:00
bcea39a858
Fix "make install" with configure outside srcdir.
2010-03-17 20:20:40 -04:00
ba93a08b40
Support runtime access to public signal names
2010-03-17 08:22:49 -04:00
6ef44a6fbb
Version bump
2010-03-17 07:59:12 -04:00
e57d004718
Fix clock-gates with non-AND complex logic, bug220.
2010-03-16 18:50:26 -04:00
d780d0aabb
Fix flushing VCD buffers on .
2010-03-12 20:00:08 -05:00
381972c923
Fix Mac OS-X compile issues, bug217.
2010-02-26 19:50:44 -05:00
f1b6c0c559
Support "`default_nettype none|wire".
2010-02-23 09:27:16 -05:00
e39eddf3fe
Fix parametrized defines with empty arguments.
2010-02-21 07:20:39 -05:00
cdd06e7236
Support "break", "continue", "return".
2010-02-14 10:01:21 -05:00
63f30492be
Skip SystemC tests if not installed.
2010-02-08 20:51:43 -05:00
0e8772290d
Fix make uninstall, bug216
2010-02-08 09:28:40 -05:00
716f237c4c
Version bump
2010-02-07 07:01:13 -05:00
b85e7ab0b1
Commentary
2010-02-06 20:00:13 -05:00
8dca56521b
Fix MinGW compilation printing %lls, bug214
2010-02-01 09:28:53 -05:00
c49e0ac5c8
Add -CFLAGS, -LDFLAGS, <file>.a, <file>.o, and <file>.so options.
2010-01-28 19:33:02 -05:00
4df9d70e4a
Support 1800-2009 /*comments*/ in define values. Match Verilog-Perl
2010-01-28 09:41:24 -05:00
11e702c430
SystemPerl is no longer required for tracing.
...
Applications must use VerilatedVcdC class in place of SpTraceVcdC.
2010-01-24 18:37:01 -05:00
b0f431e1a2
Fix MSVC++ 2008 compile issues, bug209.
2010-01-24 07:52:43 -05:00
58efab5cdf
Add SystemVerilog 1800-2009 keywords
2010-01-21 21:58:45 -05:00
c695af31b8
Add experimental config files to filter warnings outside of the source.
2010-01-21 06:11:30 -05:00
6196cf09ff
Add experimental --pipe-filter to filter all Verilog input.
2010-01-20 07:15:51 -05:00
d2bce042a5
Fix for variable typing, bug205.
2010-01-19 19:27:36 -05:00
bded8755a1
Support multi-dimensional arrays as inputs/outputs
2010-01-19 13:18:40 -05:00
89e03a86b7
Support assignments of multidimensional slices, bug170
2010-01-19 10:52:11 -05:00
d651063749
Fix Cygwin 1.7.x compiler error with uint32_t, bug204.
2010-01-16 11:53:08 -05:00
e40b5819bd
Speed compiles by avoiding including the STL iostream header.
2010-01-14 21:03:06 -05:00
d1cb3b0d15
Fix duplicate implicit variables under generates, bug201
2010-01-11 12:36:12 -05:00
c1fc629c54
Fix lint_off/lint_on pairs on same line as warning
2010-01-09 12:33:01 -05:00
0c4e40102f
Make duplicate modules a MODDUP error that can be disabled
2010-01-07 20:25:54 -05:00
27e8126b18
Cdc commentary
2010-01-07 18:51:52 -05:00
bf860b21d7
Clock domain crossing checks
2010-01-07 16:41:19 -05:00
729dfdfed7
Copyright year update
2010-01-05 21:15:06 -05:00
dbce06500d
Support enums
2009-12-27 08:29:55 -05:00
7a81dd3378
Fix tracing with --pins-bv 1, bug195
2009-12-25 10:01:55 -05:00
e7cbefa316
Support 1800-2009 defines with default arguments.
2009-12-24 11:33:39 -05:00
9b0d26aedd
Support `undefineall
2009-12-20 22:26:48 -05:00
ef3ed6e338
Support DPI exports
2009-12-20 08:27:00 -05:00
934dc842e0
Add --bbox-unsup option to black-box unsupported UDP tables.
2009-12-16 11:45:28 -05:00
6a2aa7e4f0
Fix creating implicit variables for expressions, bug196.
2009-12-08 18:29:24 -05:00
a40fae04ce
Support direct programming interface (DPI) "import".
2009-12-03 06:55:29 -05:00
f8cb6979d7
Add Makefile VM_GLOBAL_FAST, listing objects needed to link executables.
...
Add additional commentary to makefiles and other output files.
2009-12-02 21:15:56 -05:00
d2a27a84cf
Support chandle
2009-11-24 09:11:25 -05:00
c7d8eb126f
Support and .
2009-11-23 21:24:55 -05:00
af5aa38bc3
Fix `define argument mis-replacing system task of same name, bug191.
2009-11-23 14:26:04 -05:00
62f707f501
Support $test$plusargs and $value$plusargs, but see the docs.
2009-11-19 17:04:21 -05:00
19d62b7a68
Support 'time'.
2009-11-19 10:45:59 -05:00
3fc55bba8e
Fix MinGW compilation, bug184.
2009-11-13 11:08:30 -05:00
736b9074c8
Support for loop i++, ++i, i--, --i, bug175.
2009-11-10 16:40:07 -05:00
376147911f
Support optional cell parenthesis, bug179
2009-11-10 16:29:58 -05:00
82d917c2c5
Fix Verilator core dump on wide integer divides, bug178.
2009-11-10 10:44:50 -05:00
67d1dad77c
Support declarations in loop initializers, bug172.
2009-11-09 19:09:27 -05:00
3b39c3391d
Support "import".
2009-11-09 19:07:59 -05:00
68567e763c
Support "package" and $unit.
...
Add VARHIDDEN warning when signal name hides module name.
2009-11-07 21:05:02 -05:00
377f194837
Support typedef
2009-11-06 23:16:06 -05:00
b1ce6bd5cc
Support "var"
2009-11-05 19:57:31 -05:00
81915540de
Support "reg x [3][2]".
2009-11-05 19:26:44 -05:00
0d65f08b1d
Support "program".
2009-11-05 19:09:45 -05:00
ffbd1fd474
Support "reg [1:0][1:0][1:0]", bug176.
2009-11-05 09:57:23 -05:00
f59467b897
Support void functions.
...
Fix "int" etc added in wrong keyword section in last commit.
2009-11-02 22:50:31 -05:00
6bc81d3d26
Support byte, shortint, int, longint in variables, parameters and functions.
...
Internals: function/var sizing and signing now comes via dtypep()
Internals: cleanup code that widths parameters (again)
2009-11-02 22:14:11 -05:00
e4d5367ead
Version bump
2009-10-26 20:19:23 -04:00
47b5157f01
Support division and modulus of > 64 bit vectors.
2009-10-26 20:12:09 -04:00
39444d83c5
Support little endian bit vectors ("reg [0:2] x;").
2009-10-25 16:53:55 -04:00
e14695c96e
Fix erroring on strings with backslashed newlines, bug168.
2009-10-22 21:46:49 -04:00
b1e6fe7139
Fix core dump with SystemVerilog var declarations under unnamed begins.
2009-10-11 20:50:31 -04:00
92718a819c
Fix cell port connection to unsized integer causing false width warning.
2009-10-09 22:55:37 -04:00
ceb2f6894f
Fix writing to out-of-bounds arrays writing element 0.
2009-10-08 20:42:45 -04:00
Wilson Snyder
Byron Bradley