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26 Commits

Author SHA1 Message Date
Wilson Snyder 680236b03e Internals: Redo post-error additional information to be part of error calls. 2025-05-10 16:20:12 -04:00
github action 7aad136972 Apply 'make format' 2025-04-18 09:36:29 +00:00
John Khoo fee839a80e
Update UNOPTFLAT warning to suggest isolate_assignments (#5942) 2025-04-18 18:35:36 +09:00
Wilson Snyder 27d3eb5b7b Fix UNOPTFLAT warnings with `--coverage-trace` and always_comb (#5821). 2025-03-02 20:02:55 -05:00
Wilson Snyder 8fbb725f34 Copyright year update. 2025-01-01 08:30:25 -05:00
Geza Lore 98206a4f04
Improve V3List user interface (#4996) 2024-03-25 23:06:25 +00:00
Wilson Snyder e76f29e5ba Copyright year update 2024-01-01 03:19:59 -05:00
Wilson Snyder b5828a7ce9 Fix header order botched by clang-format in recent commit. 2023-10-18 06:37:46 -04:00
github action 770cd24f27 Apply 'make format' 2023-10-18 02:50:27 +00:00
Wilson Snyder 431bb1ed16
Support compiling Verilator with gcc/clang precompiled headers (#4579) 2023-10-17 22:49:28 -04:00
Mariusz Glebocki 28bd7e5b19
Rework multithreading handling to separate by code units that use/never use it. (#4228) 2023-09-24 22:12:23 -04:00
Wilson Snyder 8c480fd39e Internals: Fix cppcheck warnings 2023-08-31 18:29:58 -04:00
Krzysztof Bieganski ffbbd438ae
Internals: Use runtime type info instead of `dynamic_cast` for faster graph type checks (#4397) 2023-08-31 18:00:53 -04:00
Wilson Snyder add68130b8 Internals: Rename to dumpLevel(), to avoid confusion with make-a-dump() 2023-05-03 18:04:10 -04:00
Kamil Rakoczy 798d7346cf
Internals: Add VL_MT_SAFE attribute to functions that requires locking. (#3805) 2023-03-17 20:24:15 -04:00
Wilson Snyder d1b55cb7aa Fix compile error last commit (#4029) 2023-03-16 20:22:08 -04:00
Wilson Snyder b2ced6ff1d Add more debug info to --report-unoptflat graph (#4039) 2023-03-16 19:47:13 -04:00
Kamil Rakoczy 93d50c4499
Internals: Add mutex to V3Error (#3680) 2023-02-09 22:15:37 -05:00
Wilson Snyder b24d7c83d3 Copyright year update 2023-01-01 10:18:39 -05:00
HungMingWu 196f3292d5 Improve V3Ast function usage ergonomics (#3650) 
Signed-off-by: HungMingWu <u9089000@gmail.com>
 2022-10-21 14:12:12 +01:00
Geza Lore ddb678cc5b Merge branch 'master' into develop-v5 2022-09-22 17:33:36 +01:00
Geza Lore fd6275a62b Merge branch 'master' into develop-v5 2022-09-05 17:03:43 +01:00
Geza Lore c266739e9f Merge branch 'master' into develop-v5 2022-08-05 12:17:57 +01:00
Wilson Snyder 12925cd8b0 Internals: clang-tidy cleanups. No functional change intended. 2022-07-30 12:49:30 -04:00
Geza Lore 282887d9c6 Fix code coverage holes 
Fixes #3422
 2022-05-16 21:22:21 +01:00
Geza Lore 599d23697d
IEEE compliant scheduler (#3384) 
This is a major re-design of the way code is scheduled in Verilator,
with the goal of properly supporting the Active and NBA regions of the
SystemVerilog scheduling model, as defined in IEEE 1800-2017 chapter 4.

With this change, all internally generated clocks should simulate
correctly, and there should be no more need for the `clock_enable` and
`clocker` attributes for correctness in the absence of Verilator
generated library models (`--lib-create`).

Details of the new scheduling model and algorithm are provided in
docs/internals.rst.

Implements #3278
 2022-05-15 16:03:32 +01:00