From fe562d4715497283fc704362f7829268096ff75e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 5 May 2025 19:54:52 -0400
Subject: [PATCH] Internals: Move Stream dtype conversion to V3Width, towards
 future parser

---
 src/V3Ast.h     |  4 +++-
 src/V3Width.cpp | 14 ++++++++++++++
 src/verilog.y   |  8 ++------
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 37ec30133..241eb0383 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -458,6 +458,7 @@ public:
         ILLEGAL,
         //
         DIM_BITS,                       // V3Const converts to constant
+        DIM_BITS_OR_NUMBER,             // V3Const converts to constant
         DIM_DIMENSIONS,                 // V3Width converts to constant
         DIM_HIGH,                       // V3Width processes
         DIM_INCREMENT,                  // V3Width processes
@@ -500,7 +501,8 @@ public:
         // clang-format off
         static const char* const names[] = {
             "%E-AT",
-            "DIM_BITS", "DIM_DIMENSIONS", "DIM_HIGH", "DIM_INCREMENT", "DIM_LEFT",
+            "DIM_BITS", "DIM_BITS_OR_NUMBER", "DIM_DIMENSIONS",
+            "DIM_HIGH", "DIM_INCREMENT", "DIM_LEFT",
             "DIM_LOW", "DIM_RIGHT", "DIM_SIZE", "DIM_UNPK_DIMENSIONS",
             "DT_PUBLIC",
             "ENUM_FIRST", "ENUM_LAST", "ENUM_NUM",
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 4a3771a79..8b9383f61 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -1672,6 +1672,20 @@ class WidthVisitor final : public VNVisitor {
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
             break;
         }
+        case VAttrType::DIM_BITS_OR_NUMBER: {
+            // If dtype, compute DIM_BITS, else take expression as a number to use
+            if (VN_IS(nodep->fromp(), NodeExpr)) {
+                nodep->replaceWith(nodep->fromp()->unlinkFrBack());
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
+            } else {
+                AstNode* newp = new AstAttrOf{nodep->fileline(), VAttrType::DIM_BITS,
+                                              nodep->fromp()->unlinkFrBack()};
+                nodep->replaceWith(newp);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                userIterateAndNext(newp, WidthVP{SELF, BOTH}.p());  // Convert AttrOf
+            }
+            return;
+        }
         case VAttrType::DIM_BITS:
         case VAttrType::DIM_HIGH:
         case VAttrType::DIM_INCREMENT:
diff --git a/src/verilog.y b/src/verilog.y
index 126c2089c..80ed887c1 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -5437,13 +5437,9 @@ streaming_concatenation<nodeStreamp>: // ==IEEE: streaming_concatenation
         |       '{' yP_SRIGHT stream_concatenation '}'
                         { $$ = new AstStreamR{$2, $3, new AstConst{$2, 1}}; }
         |       '{' yP_SLEFT  stream_expressionOrDataType stream_concatenation '}'
-                        { AstNodeExpr* const bitsp = VN_IS($3, NodeExpr) ? VN_AS($3, NodeExpr)
-                                                                         : new AstAttrOf{$1, VAttrType::DIM_BITS, $3};
-                          $$ = new AstStreamL{$2, $4, bitsp}; }
+                        { $$ = new AstStreamL{$2, $4, new AstAttrOf{$1, VAttrType::DIM_BITS_OR_NUMBER, $3}}; }
         |       '{' yP_SRIGHT stream_expressionOrDataType stream_concatenation '}'
-                        { AstNodeExpr* const bitsp = VN_IS($3, NodeExpr) ? VN_AS($3, NodeExpr)
-                                                                          : new AstAttrOf{$1, VAttrType::DIM_BITS, $3};
-                          $$ = new AstStreamR{$2, $4, bitsp}; }
+                        { $$ = new AstStreamR{$2, $4, new AstAttrOf{$1, VAttrType::DIM_BITS_OR_NUMBER, $3}}; }
         ;
 
 stream_concatenation<nodeExprp>:    // ==IEEE: stream_concatenation