diff --git a/Changes b/Changes index 04bbd4f37..4782fd6dc 100644 --- a/Changes +++ b/Changes @@ -7,6 +7,8 @@ indicates the contributor was also the author of the fix; Thanks! *** Add --trace-max-width and --trace-max-array, bug 319. [Alex Solomatnikov] +*** Add --Wno-fatal to turn off abort on warnings. [by Stefan Wallentowitz] + **** Support ${...} and $(...) env vars in .vc files. [by Stefan Wallentowitz] **** Support $bits(data_type), bug327. [Alex Solomatnikov] diff --git a/bin/verilator b/bin/verilator index b8bc4171a..9ca26cae8 100755 --- a/bin/verilator +++ b/bin/verilator @@ -306,6 +306,7 @@ descriptions in the next sections for more information. -Wno- Disable warning -Wno-lint Disable all lint warnings -Wno-style Disable all style warnings + -Wno-fatal Disable fatal exit on warnings -x-assign Initially assign Xs to this value -y Directory to search for modules @@ -912,6 +913,14 @@ already disabled). This is equivalent to "-Wno-DECLFILENAME -Wno-DEFPARAM -Wno-INCABSPATH -Wno-SYNCASYNCNET -Wno-UNDRIVEN -Wno-UNUSED -Wno-VARHIDDEN". +=item -Wno-fatal + +When warnings are detected, print them, but do not exit the simulator. + +Having warning messages in builds is sloppy. It is strongly recommended +you cleanup your code, use inline lint_off, or use -Wno-... flags rather +than using this option. + =item -Wwarn-I Enables the specified warning message. diff --git a/src/V3Error.cpp b/src/V3Error.cpp index 8a5a7a337..f8c568c29 100644 --- a/src/V3Error.cpp +++ b/src/V3Error.cpp @@ -309,7 +309,7 @@ void V3Error::abortIfErrors() { } void V3Error::abortIfWarnings() { - if (errorOrWarnCount()) { + if (v3Global.opt.warnFatal() ? errorOrWarnCount() : errorCount()) { v3fatal ("Exiting due to "< ["--lint-only -Wno-fatal"], + fails=>0, + verilator_make_gcc => 0, + make_top_shell => 0, + make_main => 0, + expect=> +q{%Warning-WIDTH: t/t_flag_wfatal.v:\d+: Operator ASSIGNW expects 4 bits on the Assign RHS, but Assign RHS.s CONST '6'h2e' generates 6 bits. +%Warning-WIDTH: Use .* and lint_on around source to disable this message. +}, + ) if $Self->{v3}; + +ok(1); +1; diff --git a/test_regress/t/t_flag_wfatal.v b/test_regress/t/t_flag_wfatal.v new file mode 100644 index 000000000..11acd8683 --- /dev/null +++ b/test_regress/t/t_flag_wfatal.v @@ -0,0 +1,11 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2005 by Wilson Snyder. + +module t (/*AUTOARG*/); + + // Width error below + wire [3:0] foo = 6'h2e; + +endmodule