From fadc6776ece0ebac1944cd5670497aab0cd0a9a7 Mon Sep 17 00:00:00 2001 From: James Hanlon Date: Mon, 18 Jan 2021 13:03:18 +0000 Subject: [PATCH] For --flatten, override inlining of public and no_inline modules (#2761) --- src/V3Inline.cpp | 6 ++- test_regress/t/t_xml_flat_no_inline_mod.out | 41 +++++++++++++++++++++ test_regress/t/t_xml_flat_no_inline_mod.pl | 25 +++++++++++++ test_regress/t/t_xml_flat_no_inline_mod.v | 13 +++++++ test_regress/t/t_xml_flat_pub_mod.out | 41 +++++++++++++++++++++ test_regress/t/t_xml_flat_pub_mod.pl | 25 +++++++++++++ test_regress/t/t_xml_flat_pub_mod.v | 13 +++++++ 7 files changed, 162 insertions(+), 2 deletions(-) create mode 100644 test_regress/t/t_xml_flat_no_inline_mod.out create mode 100644 test_regress/t/t_xml_flat_no_inline_mod.pl create mode 100644 test_regress/t/t_xml_flat_no_inline_mod.v create mode 100644 test_regress/t/t_xml_flat_pub_mod.out create mode 100644 test_regress/t/t_xml_flat_pub_mod.pl create mode 100644 test_regress/t/t_xml_flat_pub_mod.v diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp index e81a28365..f9ea8c53d 100644 --- a/src/V3Inline.cpp +++ b/src/V3Inline.cpp @@ -108,7 +108,9 @@ private: // If inlining moves post-scope this can perhaps be relaxed. cantInline("modIface", true); } - if (m_modp->modPublic()) cantInline("modPublic", false); + if (m_modp->modPublic() && (m_modp->isTop() || !v3Global.opt.flatten())) { + cantInline("modPublic", false); + } iterateChildren(nodep); m_modp = nullptr; @@ -137,7 +139,7 @@ private: } else if (nodep->pragType() == AstPragmaType::NO_INLINE_MODULE) { if (!m_modp) { nodep->v3error("Inline pragma not under a module"); // LCOV_EXCL_LINE - } else { + } else if (!v3Global.opt.flatten()) { cantInline("Pragma NO_INLINE_MODULE", false); } // Remove so don't propagate to upper cell... diff --git a/test_regress/t/t_xml_flat_no_inline_mod.out b/test_regress/t/t_xml_flat_no_inline_mod.out new file mode 100644 index 000000000..803aa990b --- /dev/null +++ b/test_regress/t/t_xml_flat_no_inline_mod.out @@ -0,0 +1,41 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/test_regress/t/t_xml_flat_no_inline_mod.pl b/test_regress/t/t_xml_flat_no_inline_mod.pl new file mode 100644 index 000000000..9c51c5674 --- /dev/null +++ b/test_regress/t/t_xml_flat_no_inline_mod.pl @@ -0,0 +1,25 @@ +#!/usr/bin/env perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2012 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(vlt => 1); + +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + verilator_flags2 => ['--xml-only', '--flatten'], + verilator_make_gmake => 0, + make_top_shell => 0, + make_main => 0, + ); + +files_identical("$out_filename", $Self->{golden_filename}); + +ok(1); +1; diff --git a/test_regress/t/t_xml_flat_no_inline_mod.v b/test_regress/t/t_xml_flat_no_inline_mod.v new file mode 100644 index 000000000..cf87b71a0 --- /dev/null +++ b/test_regress/t/t_xml_flat_no_inline_mod.v @@ -0,0 +1,13 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2008 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +module foo(input logic i_clk); /* verilator no_inline_module */ +endmodule + +// --flatten forces inlining of 'no_inline_module' module foo. +module top(input logic i_clk); + foo f(.*); +endmodule diff --git a/test_regress/t/t_xml_flat_pub_mod.out b/test_regress/t/t_xml_flat_pub_mod.out new file mode 100644 index 000000000..5515cd69c --- /dev/null +++ b/test_regress/t/t_xml_flat_pub_mod.out @@ -0,0 +1,41 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/test_regress/t/t_xml_flat_pub_mod.pl b/test_regress/t/t_xml_flat_pub_mod.pl new file mode 100644 index 000000000..9c51c5674 --- /dev/null +++ b/test_regress/t/t_xml_flat_pub_mod.pl @@ -0,0 +1,25 @@ +#!/usr/bin/env perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2012 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(vlt => 1); + +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + verilator_flags2 => ['--xml-only', '--flatten'], + verilator_make_gmake => 0, + make_top_shell => 0, + make_main => 0, + ); + +files_identical("$out_filename", $Self->{golden_filename}); + +ok(1); +1; diff --git a/test_regress/t/t_xml_flat_pub_mod.v b/test_regress/t/t_xml_flat_pub_mod.v new file mode 100644 index 000000000..4fa40e587 --- /dev/null +++ b/test_regress/t/t_xml_flat_pub_mod.v @@ -0,0 +1,13 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2008 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +module foo(input logic i_clk); /* verilator public_module */ +endmodule + +// --flatten forces inlining of public module foo. +module top(input logic i_clk); + foo f(.*); +endmodule