From f04b441dadd86ba3730731e88f4bf532ba0e985c Mon Sep 17 00:00:00 2001 From: wsxarcher Date: Tue, 9 Jun 2026 02:03:13 +0200 Subject: [PATCH] fix --- test_regress/t/t_disable_fork_nested.v | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/test_regress/t/t_disable_fork_nested.v b/test_regress/t/t_disable_fork_nested.v index ec3cc8ca6..ad6a4d51e 100644 --- a/test_regress/t/t_disable_fork_nested.v +++ b/test_regress/t/t_disable_fork_nested.v @@ -1,7 +1,6 @@ // DESCRIPTION: Verilator: Verilog Test module // -// This file ONLY is placed under the Creative Commons Public Domain, for -// any use, without warranty, 2026 by Wilson Snyder. +// This file ONLY is placed under the Creative Commons Public Domain. // SPDX-FileCopyrightText: 2026 Wilson Snyder // SPDX-License-Identifier: CC0-1.0