diff --git a/test_regress/t/t_assert_ctl_arg.coverage.out b/test_regress/t/t_assert_ctl_arg.coverage.out
deleted file mode 100644
index cdcafbd93..000000000
--- a/test_regress/t/t_assert_ctl_arg.coverage.out
+++ /dev/null
@@ -1,2 +0,0 @@
-#SystemC::Coverage - 3
-C 'ft/t_assert_ctl_arg.vl100n32pagev_user/tocover_simple_immediate_100htop.t.cover_simple_immediate_100' 1 C 'ft/t_assert_ctl_arg.vl100n37pagev_user/tocover_simple_immediate_stmt_100htop.t.cover_simple_immediate_stmt_100' 1 C 'ft/t_assert_ctl_arg.vl100n40pagev_user/tocover_final_deferred_immediate_100htop.t.cover_final_deferred_immediate_100' 1 C 'ft/t_assert_ctl_arg.vl100n43pagev_user/tocover_observed_deferred_immediate_100htop.t.cover_observed_deferred_immediate_100' 1 C 'ft/t_assert_ctl_arg.vl100n45pagev_user/tocover_final_deferred_immediate_stmt_100htop.t.cover_final_deferred_immediate_stmt_100' 1 C 'ft/t_assert_ctl_arg.vl100n48pagev_user/tocover_observed_deferred_immediate_stmt_100htop.t.cover_observed_deferred_immediate_stmt_100' 1 C 'ft/t_assert_ctl_arg.vl103n32pagev_user/tocover_simple_immediate_103htop.t.cover_simple_immediate_103' 0 C 'ft/t_assert_ctl_arg.vl103n37pagev_user/tocover_simple_immediate_stmt_103htop.t.cover_simple_immediate_stmt_103' 0 C 'ft/t_assert_ctl_arg.vl103n40pagev_user/tocover_final_deferred_immediate_103htop.t.cover_final_deferred_immediate_103' 0 C 'ft/t_assert_ctl_arg.vl103n43pagev_user/tocover_observed_deferred_immediate_103htop.t.cover_observed_deferred_immediate_103' 0 C 'ft/t_assert_ctl_arg.vl103n45pagev_user/tocover_final_deferred_immediate_stmt_103htop.t.cover_final_deferred_immediate_stmt_103' 0 C 'ft/t_assert_ctl_arg.vl103n48pagev_user/tocover_observed_deferred_immediate_stmt_103htop.t.cover_observed_deferred_immediate_stmt_103' 0 C 'ft/t_assert_ctl_arg.vl106n32pagev_user/tocover_simple_immediate_106htop.t.cover_simple_immediate_106' 1 C 'ft/t_assert_ctl_arg.vl106n37pagev_user/tocover_simple_immediate_stmt_106htop.t.cover_simple_immediate_stmt_106' 1 C 'ft/t_assert_ctl_arg.vl106n40pagev_user/tocover_final_deferred_immediate_106htop.t.cover_final_deferred_immediate_106' 1 C 'ft/t_assert_ctl_arg.vl106n43pagev_user/tocover_observed_deferred_immediate_106htop.t.cover_observed_deferred_immediate_106' 1 C 'ft/t_assert_ctl_arg.vl106n45pagev_user/tocover_final_deferred_immediate_stmt_106htop.t.cover_final_deferred_immediate_stmt_106' 1 C 'ft/t_assert_ctl_arg.vl106n48pagev_user/tocover_observed_deferred_immediate_stmt_106htop.t.cover_observed_deferred_immediate_stmt_106' 1 C 'ft/t_assert_ctl_arg.vl108n32pagev_user/tocover_simple_immediate_108htop.t.cover_simple_immediate_108' 1 C 'ft/t_assert_ctl_arg.vl108n37pagev_user/tocover_simple_immediate_stmt_108htop.t.cover_simple_immediate_stmt_108' 1 C 'ft/t_assert_ctl_arg.vl108n40pagev_user/tocover_final_deferred_immediate_108htop.t.cover_final_deferred_immediate_108' 1 C 'ft/t_assert_ctl_arg.vl108n43pagev_user/tocover_observed_deferred_immediate_108htop.t.cover_observed_deferred_immediate_108' 1 C 'ft/t_assert_ctl_arg.vl108n45pagev_user/tocover_final_deferred_immediate_stmt_108htop.t.cover_final_deferred_immediate_stmt_108' 1 C 'ft/t_assert_ctl_arg.vl108n48pagev_user/tocover_observed_deferred_immediate_stmt_108htop.t.cover_observed_deferred_immediate_stmt_108' 1 C 'ft/t_assert_ctl_arg.vl110n32pagev_user/tocover_simple_immediate_110htop.t.cover_simple_immediate_110' 0 C 'ft/t_assert_ctl_arg.vl110n37pagev_user/tocover_simple_immediate_stmt_110htop.t.cover_simple_immediate_stmt_110' 0 C 'ft/t_assert_ctl_arg.vl110n40pagev_user/tocover_final_deferred_immediate_110htop.t.cover_final_deferred_immediate_110' 0 C 'ft/t_assert_ctl_arg.vl110n43pagev_user/tocover_observed_deferred_immediate_110htop.t.cover_observed_deferred_immediate_110' 0 C 'ft/t_assert_ctl_arg.vl110n45pagev_user/tocover_final_deferred_immediate_stmt_110htop.t.cover_final_deferred_immediate_stmt_110' 0 C 'ft/t_assert_ctl_arg.vl110n48pagev_user/tocover_observed_deferred_immediate_stmt_110htop.t.cover_observed_deferred_immediate_stmt_110' 0 C 'ft/t_assert_ctl_arg.vl112n32pagev_user/tocover_simple_immediate_112htop.t.cover_simple_immediate_112' 1 C 'ft/t_assert_ctl_arg.vl112n37pagev_user/tocover_simple_immediate_stmt_112htop.t.cover_simple_immediate_stmt_112' 1 C 'ft/t_assert_ctl_arg.vl112n40pagev_user/tocover_final_deferred_immediate_112htop.t.cover_final_deferred_immediate_112' 1 C 'ft/t_assert_ctl_arg.vl112n43pagev_user/tocover_observed_deferred_immediate_112htop.t.cover_observed_deferred_immediate_112' 0 C 'ft/t_assert_ctl_arg.vl112n45pagev_user/tocover_final_deferred_immediate_stmt_112htop.t.cover_final_deferred_immediate_stmt_112' 1 C 'ft/t_assert_ctl_arg.vl112n48pagev_user/tocover_observed_deferred_immediate_stmt_112htop.t.cover_observed_deferred_immediate_stmt_112' 0 C 'ft/t_assert_ctl_arg.vl192n22pagev_user/concurrentocover_concurrenthtop.t.concurrent.cover_concurrent' 0 C 'ft/t_assert_ctl_arg.vl193n27pagev_user/concurrentocover_concurrent_stmthtop.t.concurrent.cover_concurrent_stmt' 0 C 'ft/t_assert_ctl_arg.vl49n31pagev_user/tocover_simple_immediate_49htop.t.cover_simple_immediate_49' 1 C 'ft/t_assert_ctl_arg.vl49n36pagev_user/tocover_simple_immediate_stmt_49htop.t.cover_simple_immediate_stmt_49' 1 C 'ft/t_assert_ctl_arg.vl49n39pagev_user/tocover_final_deferred_immediate_49htop.t.cover_final_deferred_immediate_49' 0 C 'ft/t_assert_ctl_arg.vl49n42pagev_user/tocover_observed_deferred_immediate_49htop.t.cover_observed_deferred_immediate_49' 0 C 'ft/t_assert_ctl_arg.vl49n44pagev_user/tocover_final_deferred_immediate_stmt_49htop.t.cover_final_deferred_immediate_stmt_49' 0 C 'ft/t_assert_ctl_arg.vl49n47pagev_user/tocover_observed_deferred_immediate_stmt_49htop.t.cover_observed_deferred_immediate_stmt_49' 0 C 'ft/t_assert_ctl_arg.vl51n31pagev_user/tocover_simple_immediate_51htop.t.cover_simple_immediate_51' 0 C 'ft/t_assert_ctl_arg.vl51n36pagev_user/tocover_simple_immediate_stmt_51htop.t.cover_simple_immediate_stmt_51' 0 C 'ft/t_assert_ctl_arg.vl51n39pagev_user/tocover_final_deferred_immediate_51htop.t.cover_final_deferred_immediate_51' 0 C 'ft/t_assert_ctl_arg.vl51n42pagev_user/tocover_observed_deferred_immediate_51htop.t.cover_observed_deferred_immediate_51' 0 C 'ft/t_assert_ctl_arg.vl51n44pagev_user/tocover_final_deferred_immediate_stmt_51htop.t.cover_final_deferred_immediate_stmt_51' 0 C 'ft/t_assert_ctl_arg.vl51n47pagev_user/tocover_observed_deferred_immediate_stmt_51htop.t.cover_observed_deferred_immediate_stmt_51' 0 C 'ft/t_assert_ctl_arg.vl56n31pagev_user/tocover_simple_immediate_56htop.t.cover_simple_immediate_56' 0 C 'ft/t_assert_ctl_arg.vl56n36pagev_user/tocover_simple_immediate_stmt_56htop.t.cover_simple_immediate_stmt_56' 0 C 'ft/t_assert_ctl_arg.vl56n39pagev_user/tocover_final_deferred_immediate_56htop.t.cover_final_deferred_immediate_56' 0 C 'ft/t_assert_ctl_arg.vl56n42pagev_user/tocover_observed_deferred_immediate_56htop.t.cover_observed_deferred_immediate_56' 1 C 'ft/t_assert_ctl_arg.vl56n44pagev_user/tocover_final_deferred_immediate_stmt_56htop.t.cover_final_deferred_immediate_stmt_56' 0 C 'ft/t_assert_ctl_arg.vl56n47pagev_user/tocover_observed_deferred_immediate_stmt_56htop.t.cover_observed_deferred_immediate_stmt_56' 1 C 'ft/t_assert_ctl_arg.vl58n31pagev_user/tocover_simple_immediate_58htop.t.cover_simple_immediate_58' 0 C 'ft/t_assert_ctl_arg.vl58n36pagev_user/tocover_simple_immediate_stmt_58htop.t.cover_simple_immediate_stmt_58' 0 C 'ft/t_assert_ctl_arg.vl58n39pagev_user/tocover_final_deferred_immediate_58htop.t.cover_final_deferred_immediate_58' 0 C 'ft/t_assert_ctl_arg.vl58n42pagev_user/tocover_observed_deferred_immediate_58htop.t.cover_observed_deferred_immediate_58' 0 C 'ft/t_assert_ctl_arg.vl58n44pagev_user/tocover_final_deferred_immediate_stmt_58htop.t.cover_final_deferred_immediate_stmt_58' 0 C 'ft/t_assert_ctl_arg.vl58n47pagev_user/tocover_observed_deferred_immediate_stmt_58htop.t.cover_observed_deferred_immediate_stmt_58' 0 C 'ft/t_assert_ctl_arg.vl63n31pagev_user/tocover_simple_immediate_63htop.t.cover_simple_immediate_63' 0 C 'ft/t_assert_ctl_arg.vl63n36pagev_user/tocover_simple_immediate_stmt_63htop.t.cover_simple_immediate_stmt_63' 0 C 'ft/t_assert_ctl_arg.vl63n39pagev_user/tocover_final_deferred_immediate_63htop.t.cover_final_deferred_immediate_63' 1 C 'ft/t_assert_ctl_arg.vl63n42pagev_user/tocover_observed_deferred_immediate_63htop.t.cover_observed_deferred_immediate_63' 0 C 'ft/t_assert_ctl_arg.vl63n44pagev_user/tocover_final_deferred_immediate_stmt_63htop.t.cover_final_deferred_immediate_stmt_63' 1 C 'ft/t_assert_ctl_arg.vl63n47pagev_user/tocover_observed_deferred_immediate_stmt_63htop.t.cover_observed_deferred_immediate_stmt_63' 0 C 'ft/t_assert_ctl_arg.vl65n31pagev_user/tocover_simple_immediate_65htop.t.cover_simple_immediate_65' 0 C 'ft/t_assert_ctl_arg.vl65n36pagev_user/tocover_simple_immediate_stmt_65htop.t.cover_simple_immediate_stmt_65' 0 C 'ft/t_assert_ctl_arg.vl65n39pagev_user/tocover_final_deferred_immediate_65htop.t.cover_final_deferred_immediate_65' 0 C 'ft/t_assert_ctl_arg.vl65n42pagev_user/tocover_observed_deferred_immediate_65htop.t.cover_observed_deferred_immediate_65' 0 C 'ft/t_assert_ctl_arg.vl65n44pagev_user/tocover_final_deferred_immediate_stmt_65htop.t.cover_final_deferred_immediate_stmt_65' 0 C 'ft/t_assert_ctl_arg.vl65n47pagev_user/tocover_observed_deferred_immediate_stmt_65htop.t.cover_observed_deferred_immediate_stmt_65' 0 C 'ft/t_assert_ctl_arg.vl69n31pagev_user/tocover_simple_immediate_69htop.t.cover_simple_immediate_69' 0 C 'ft/t_assert_ctl_arg.vl69n36pagev_user/tocover_simple_immediate_stmt_69htop.t.cover_simple_immediate_stmt_69' 0 C 'ft/t_assert_ctl_arg.vl69n39pagev_user/tocover_final_deferred_immediate_69htop.t.cover_final_deferred_immediate_69' 0 C 'ft/t_assert_ctl_arg.vl69n42pagev_user/tocover_observed_deferred_immediate_69htop.t.cover_observed_deferred_immediate_69' 0 C 'ft/t_assert_ctl_arg.vl69n44pagev_user/tocover_final_deferred_immediate_stmt_69htop.t.cover_final_deferred_immediate_stmt_69' 0 C 'ft/t_assert_ctl_arg.vl69n47pagev_user/tocover_observed_deferred_immediate_stmt_69htop.t.cover_observed_deferred_immediate_stmt_69' 0 C 'ft/t_assert_ctl_arg.vl71n31pagev_user/tocover_simple_immediate_71htop.t.cover_simple_immediate_71' 1 C 'ft/t_assert_ctl_arg.vl71n36pagev_user/tocover_simple_immediate_stmt_71htop.t.cover_simple_immediate_stmt_71' 1 C 'ft/t_assert_ctl_arg.vl71n39pagev_user/tocover_final_deferred_immediate_71htop.t.cover_final_deferred_immediate_71' 1 C 'ft/t_assert_ctl_arg.vl71n42pagev_user/tocover_observed_deferred_immediate_71htop.t.cover_observed_deferred_immediate_71' 1 C 'ft/t_assert_ctl_arg.vl71n44pagev_user/tocover_final_deferred_immediate_stmt_71htop.t.cover_final_deferred_immediate_stmt_71' 1 C 'ft/t_assert_ctl_arg.vl71n47pagev_user/tocover_observed_deferred_immediate_stmt_71htop.t.cover_observed_deferred_immediate_stmt_71' 1 C 'ft/t_assert_ctl_arg.vl73n31pagev_user/tocover_simple_immediate_73htop.t.cover_simple_immediate_73' 0 C 'ft/t_assert_ctl_arg.vl73n36pagev_user/tocover_simple_immediate_stmt_73htop.t.cover_simple_immediate_stmt_73' 0 C 'ft/t_assert_ctl_arg.vl73n39pagev_user/tocover_final_deferred_immediate_73htop.t.cover_final_deferred_immediate_73' 0 C 'ft/t_assert_ctl_arg.vl73n42pagev_user/tocover_observed_deferred_immediate_73htop.t.cover_observed_deferred_immediate_73' 0 C 'ft/t_assert_ctl_arg.vl73n44pagev_user/tocover_final_deferred_immediate_stmt_73htop.t.cover_final_deferred_immediate_stmt_73' 0 C 'ft/t_assert_ctl_arg.vl73n47pagev_user/tocover_observed_deferred_immediate_stmt_73htop.t.cover_observed_deferred_immediate_stmt_73' 0 C 'ft/t_assert_ctl_arg.vl76n31pagev_user/tocover_simple_immediate_76htop.t.cover_simple_immediate_76' 1 C 'ft/t_assert_ctl_arg.vl76n36pagev_user/tocover_simple_immediate_stmt_76htop.t.cover_simple_immediate_stmt_76' 1 C 'ft/t_assert_ctl_arg.vl76n39pagev_user/tocover_final_deferred_immediate_76htop.t.cover_final_deferred_immediate_76' 0 C 'ft/t_assert_ctl_arg.vl76n42pagev_user/tocover_observed_deferred_immediate_76htop.t.cover_observed_deferred_immediate_76' 1 C 'ft/t_assert_ctl_arg.vl76n44pagev_user/tocover_final_deferred_immediate_stmt_76htop.t.cover_final_deferred_immediate_stmt_76' 0 C 'ft/t_assert_ctl_arg.vl76n47pagev_user/tocover_observed_deferred_immediate_stmt_76htop.t.cover_observed_deferred_immediate_stmt_76' 1 C 'ft/t_assert_ctl_arg.vl78n31pagev_user/tocover_simple_immediate_78htop.t.cover_simple_immediate_78' 1 C 'ft/t_assert_ctl_arg.vl78n36pagev_user/tocover_simple_immediate_stmt_78htop.t.cover_simple_immediate_stmt_78' 1 C 'ft/t_assert_ctl_arg.vl78n39pagev_user/tocover_final_deferred_immediate_78htop.t.cover_final_deferred_immediate_78' 1 C 'ft/t_assert_ctl_arg.vl78n42pagev_user/tocover_observed_deferred_immediate_78htop.t.cover_observed_deferred_immediate_78' 1 C 'ft/t_assert_ctl_arg.vl78n44pagev_user/tocover_final_deferred_immediate_stmt_78htop.t.cover_final_deferred_immediate_stmt_78' 1 C 'ft/t_assert_ctl_arg.vl78n47pagev_user/tocover_observed_deferred_immediate_stmt_78htop.t.cover_observed_deferred_immediate_stmt_78' 1 C 'ft/t_assert_ctl_arg.vl80n31pagev_user/tocover_simple_immediate_80htop.t.cover_simple_immediate_80' 1 C 'ft/t_assert_ctl_arg.vl80n36pagev_user/tocover_simple_immediate_stmt_80htop.t.cover_simple_immediate_stmt_80' 1 C 'ft/t_assert_ctl_arg.vl80n39pagev_user/tocover_final_deferred_immediate_80htop.t.cover_final_deferred_immediate_80' 0 C 'ft/t_assert_ctl_arg.vl80n42pagev_user/tocover_observed_deferred_immediate_80htop.t.cover_observed_deferred_immediate_80' 0 C 'ft/t_assert_ctl_arg.vl80n44pagev_user/tocover_final_deferred_immediate_stmt_80htop.t.cover_final_deferred_immediate_stmt_80' 0 C 'ft/t_assert_ctl_arg.vl80n47pagev_user/tocover_observed_deferred_immediate_stmt_80htop.t.cover_observed_deferred_immediate_stmt_80' 0 C 'ft/t_assert_ctl_arg.vl82n31pagev_user/tocover_simple_immediate_82htop.t.cover_simple_immediate_82' 1 C 'ft/t_assert_ctl_arg.vl82n36pagev_user/tocover_simple_immediate_stmt_82htop.t.cover_simple_immediate_stmt_82' 1 C 'ft/t_assert_ctl_arg.vl82n39pagev_user/tocover_final_deferred_immediate_82htop.t.cover_final_deferred_immediate_82' 0 C 'ft/t_assert_ctl_arg.vl82n42pagev_user/tocover_observed_deferred_immediate_82htop.t.cover_observed_deferred_immediate_82' 0 C 'ft/t_assert_ctl_arg.vl82n44pagev_user/tocover_final_deferred_immediate_stmt_82htop.t.cover_final_deferred_immediate_stmt_82' 0 C 'ft/t_assert_ctl_arg.vl82n47pagev_user/tocover_observed_deferred_immediate_stmt_82htop.t.cover_observed_deferred_immediate_stmt_82' 0 C 'ft/t_assert_ctl_arg.vl84n31pagev_user/tocover_simple_immediate_84htop.t.cover_simple_immediate_84' 0 C 'ft/t_assert_ctl_arg.vl84n36pagev_user/tocover_simple_immediate_stmt_84htop.t.cover_simple_immediate_stmt_84' 0 C 'ft/t_assert_ctl_arg.vl84n39pagev_user/tocover_final_deferred_immediate_84htop.t.cover_final_deferred_immediate_84' 0 C 'ft/t_assert_ctl_arg.vl84n42pagev_user/tocover_observed_deferred_immediate_84htop.t.cover_observed_deferred_immediate_84' 0 C 'ft/t_assert_ctl_arg.vl84n44pagev_user/tocover_final_deferred_immediate_stmt_84htop.t.cover_final_deferred_immediate_stmt_84' 0 C 'ft/t_assert_ctl_arg.vl84n47pagev_user/tocover_observed_deferred_immediate_stmt_84htop.t.cover_observed_deferred_immediate_stmt_84' 0 C 'ft/t_assert_ctl_arg.vl86n31pagev_user/tocover_simple_immediate_86htop.t.cover_simple_immediate_86' 1 C 'ft/t_assert_ctl_arg.vl86n36pagev_user/tocover_simple_immediate_stmt_86htop.t.cover_simple_immediate_stmt_86' 1 C 'ft/t_assert_ctl_arg.vl86n39pagev_user/tocover_final_deferred_immediate_86htop.t.cover_final_deferred_immediate_86' 0 C 'ft/t_assert_ctl_arg.vl86n42pagev_user/tocover_observed_deferred_immediate_86htop.t.cover_observed_deferred_immediate_86' 0 C 'ft/t_assert_ctl_arg.vl86n44pagev_user/tocover_final_deferred_immediate_stmt_86htop.t.cover_final_deferred_immediate_stmt_86' 0 C 'ft/t_assert_ctl_arg.vl86n47pagev_user/tocover_observed_deferred_immediate_stmt_86htop.t.cover_observed_deferred_immediate_stmt_86' 0 C 'ft/t_assert_ctl_arg.vl88n31pagev_user/tocover_simple_immediate_88htop.t.cover_simple_immediate_88' 0 C 'ft/t_assert_ctl_arg.vl88n36pagev_user/tocover_simple_immediate_stmt_88htop.t.cover_simple_immediate_stmt_88' 0 C 'ft/t_assert_ctl_arg.vl88n39pagev_user/tocover_final_deferred_immediate_88htop.t.cover_final_deferred_immediate_88' 0 C 'ft/t_assert_ctl_arg.vl88n42pagev_user/tocover_observed_deferred_immediate_88htop.t.cover_observed_deferred_immediate_88' 0 C 'ft/t_assert_ctl_arg.vl88n44pagev_user/tocover_final_deferred_immediate_stmt_88htop.t.cover_final_deferred_immediate_stmt_88' 0 C 'ft/t_assert_ctl_arg.vl88n47pagev_user/tocover_observed_deferred_immediate_stmt_88htop.t.cover_observed_deferred_immediate_stmt_88' 0 C 'ft/t_assert_ctl_arg.vl90n31pagev_user/tocover_simple_immediate_90htop.t.cover_simple_immediate_90' 1 C 'ft/t_assert_ctl_arg.vl90n36pagev_user/tocover_simple_immediate_stmt_90htop.t.cover_simple_immediate_stmt_90' 1 C 'ft/t_assert_ctl_arg.vl90n39pagev_user/tocover_final_deferred_immediate_90htop.t.cover_final_deferred_immediate_90' 1 C 'ft/t_assert_ctl_arg.vl90n42pagev_user/tocover_observed_deferred_immediate_90htop.t.cover_observed_deferred_immediate_90' 1 C 'ft/t_assert_ctl_arg.vl90n44pagev_user/tocover_final_deferred_immediate_stmt_90htop.t.cover_final_deferred_immediate_stmt_90' 1 C 'ft/t_assert_ctl_arg.vl90n47pagev_user/tocover_observed_deferred_immediate_stmt_90htop.t.cover_observed_deferred_immediate_stmt_90' 1 C 'ft/t_assert_ctl_arg.vl92n31pagev_user/tocover_simple_immediate_92htop.t.cover_simple_immediate_92' 0 C 'ft/t_assert_ctl_arg.vl92n36pagev_user/tocover_simple_immediate_stmt_92htop.t.cover_simple_immediate_stmt_92' 0 C 'ft/t_assert_ctl_arg.vl92n39pagev_user/tocover_final_deferred_immediate_92htop.t.cover_final_deferred_immediate_92' 0 C 'ft/t_assert_ctl_arg.vl92n42pagev_user/tocover_observed_deferred_immediate_92htop.t.cover_observed_deferred_immediate_92' 0 C 'ft/t_assert_ctl_arg.vl92n44pagev_user/tocover_final_deferred_immediate_stmt_92htop.t.cover_final_deferred_immediate_stmt_92' 0 C 'ft/t_assert_ctl_arg.vl92n47pagev_user/tocover_observed_deferred_immediate_stmt_92htop.t.cover_observed_deferred_immediate_stmt_92' 0 C 'ft/t_assert_ctl_arg.vl97n31pagev_user/tocover_simple_immediate_97htop.t.cover_simple_immediate_97' 0 C 'ft/t_assert_ctl_arg.vl97n36pagev_user/tocover_simple_immediate_stmt_97htop.t.cover_simple_immediate_stmt_97' 0 C 'ft/t_assert_ctl_arg.vl97n39pagev_user/tocover_final_deferred_immediate_97htop.t.cover_final_deferred_immediate_97' 0 C 'ft/t_assert_ctl_arg.vl97n42pagev_user/tocover_observed_deferred_immediate_97htop.t.cover_observed_deferred_immediate_97' 0 C 'ft/t_assert_ctl_arg.vl97n44pagev_user/tocover_final_deferred_immediate_stmt_97htop.t.cover_final_deferred_immediate_stmt_97' 0 C 'ft/t_assert_ctl_arg.vl97n47pagev_user/tocover_observed_deferred_immediate_stmt_97htop.t.cover_observed_deferred_immediate_stmt_97' 0
diff --git a/test_regress/t/t_assert_ctl_arg.dat.out b/test_regress/t/t_assert_ctl_arg.dat.out
new file mode 100644
index 000000000..90e951eb6
--- /dev/null
+++ b/test_regress/t/t_assert_ctl_arg.dat.out
@@ -0,0 +1,153 @@
+# SystemC::Coverage-3
+C 'ft/t_assert_ctl_arg.vl100n32pagev_user/tocover_simple_immediate_100htop.t.cover_simple_immediate_100' 1
+C 'ft/t_assert_ctl_arg.vl100n37pagev_user/tocover_simple_immediate_stmt_100htop.t.cover_simple_immediate_stmt_100' 1
+C 'ft/t_assert_ctl_arg.vl100n40pagev_user/tocover_final_deferred_immediate_100htop.t.cover_final_deferred_immediate_100' 1
+C 'ft/t_assert_ctl_arg.vl100n43pagev_user/tocover_observed_deferred_immediate_100htop.t.cover_observed_deferred_immediate_100' 1
+C 'ft/t_assert_ctl_arg.vl100n45pagev_user/tocover_final_deferred_immediate_stmt_100htop.t.cover_final_deferred_immediate_stmt_100' 1
+C 'ft/t_assert_ctl_arg.vl100n48pagev_user/tocover_observed_deferred_immediate_stmt_100htop.t.cover_observed_deferred_immediate_stmt_100' 1
+C 'ft/t_assert_ctl_arg.vl103n32pagev_user/tocover_simple_immediate_103htop.t.cover_simple_immediate_103' 0
+C 'ft/t_assert_ctl_arg.vl103n37pagev_user/tocover_simple_immediate_stmt_103htop.t.cover_simple_immediate_stmt_103' 0
+C 'ft/t_assert_ctl_arg.vl103n40pagev_user/tocover_final_deferred_immediate_103htop.t.cover_final_deferred_immediate_103' 0
+C 'ft/t_assert_ctl_arg.vl103n43pagev_user/tocover_observed_deferred_immediate_103htop.t.cover_observed_deferred_immediate_103' 0
+C 'ft/t_assert_ctl_arg.vl103n45pagev_user/tocover_final_deferred_immediate_stmt_103htop.t.cover_final_deferred_immediate_stmt_103' 0
+C 'ft/t_assert_ctl_arg.vl103n48pagev_user/tocover_observed_deferred_immediate_stmt_103htop.t.cover_observed_deferred_immediate_stmt_103' 0
+C 'ft/t_assert_ctl_arg.vl106n32pagev_user/tocover_simple_immediate_106htop.t.cover_simple_immediate_106' 1
+C 'ft/t_assert_ctl_arg.vl106n37pagev_user/tocover_simple_immediate_stmt_106htop.t.cover_simple_immediate_stmt_106' 1
+C 'ft/t_assert_ctl_arg.vl106n40pagev_user/tocover_final_deferred_immediate_106htop.t.cover_final_deferred_immediate_106' 1
+C 'ft/t_assert_ctl_arg.vl106n43pagev_user/tocover_observed_deferred_immediate_106htop.t.cover_observed_deferred_immediate_106' 1
+C 'ft/t_assert_ctl_arg.vl106n45pagev_user/tocover_final_deferred_immediate_stmt_106htop.t.cover_final_deferred_immediate_stmt_106' 1
+C 'ft/t_assert_ctl_arg.vl106n48pagev_user/tocover_observed_deferred_immediate_stmt_106htop.t.cover_observed_deferred_immediate_stmt_106' 1
+C 'ft/t_assert_ctl_arg.vl108n32pagev_user/tocover_simple_immediate_108htop.t.cover_simple_immediate_108' 1
+C 'ft/t_assert_ctl_arg.vl108n37pagev_user/tocover_simple_immediate_stmt_108htop.t.cover_simple_immediate_stmt_108' 1
+C 'ft/t_assert_ctl_arg.vl108n40pagev_user/tocover_final_deferred_immediate_108htop.t.cover_final_deferred_immediate_108' 1
+C 'ft/t_assert_ctl_arg.vl108n43pagev_user/tocover_observed_deferred_immediate_108htop.t.cover_observed_deferred_immediate_108' 1
+C 'ft/t_assert_ctl_arg.vl108n45pagev_user/tocover_final_deferred_immediate_stmt_108htop.t.cover_final_deferred_immediate_stmt_108' 1
+C 'ft/t_assert_ctl_arg.vl108n48pagev_user/tocover_observed_deferred_immediate_stmt_108htop.t.cover_observed_deferred_immediate_stmt_108' 1
+C 'ft/t_assert_ctl_arg.vl110n32pagev_user/tocover_simple_immediate_110htop.t.cover_simple_immediate_110' 0
+C 'ft/t_assert_ctl_arg.vl110n37pagev_user/tocover_simple_immediate_stmt_110htop.t.cover_simple_immediate_stmt_110' 0
+C 'ft/t_assert_ctl_arg.vl110n40pagev_user/tocover_final_deferred_immediate_110htop.t.cover_final_deferred_immediate_110' 0
+C 'ft/t_assert_ctl_arg.vl110n43pagev_user/tocover_observed_deferred_immediate_110htop.t.cover_observed_deferred_immediate_110' 0
+C 'ft/t_assert_ctl_arg.vl110n45pagev_user/tocover_final_deferred_immediate_stmt_110htop.t.cover_final_deferred_immediate_stmt_110' 0
+C 'ft/t_assert_ctl_arg.vl110n48pagev_user/tocover_observed_deferred_immediate_stmt_110htop.t.cover_observed_deferred_immediate_stmt_110' 0
+C 'ft/t_assert_ctl_arg.vl112n32pagev_user/tocover_simple_immediate_112htop.t.cover_simple_immediate_112' 1
+C 'ft/t_assert_ctl_arg.vl112n37pagev_user/tocover_simple_immediate_stmt_112htop.t.cover_simple_immediate_stmt_112' 1
+C 'ft/t_assert_ctl_arg.vl112n40pagev_user/tocover_final_deferred_immediate_112htop.t.cover_final_deferred_immediate_112' 1
+C 'ft/t_assert_ctl_arg.vl112n43pagev_user/tocover_observed_deferred_immediate_112htop.t.cover_observed_deferred_immediate_112' 0
+C 'ft/t_assert_ctl_arg.vl112n45pagev_user/tocover_final_deferred_immediate_stmt_112htop.t.cover_final_deferred_immediate_stmt_112' 1
+C 'ft/t_assert_ctl_arg.vl112n48pagev_user/tocover_observed_deferred_immediate_stmt_112htop.t.cover_observed_deferred_immediate_stmt_112' 0
+C 'ft/t_assert_ctl_arg.vl192n22pagev_user/concurrentocover_concurrenthtop.t.concurrent.cover_concurrent' 0
+C 'ft/t_assert_ctl_arg.vl193n27pagev_user/concurrentocover_concurrent_stmthtop.t.concurrent.cover_concurrent_stmt' 0
+C 'ft/t_assert_ctl_arg.vl49n31pagev_user/tocover_simple_immediate_49htop.t.cover_simple_immediate_49' 1
+C 'ft/t_assert_ctl_arg.vl49n36pagev_user/tocover_simple_immediate_stmt_49htop.t.cover_simple_immediate_stmt_49' 1
+C 'ft/t_assert_ctl_arg.vl49n39pagev_user/tocover_final_deferred_immediate_49htop.t.cover_final_deferred_immediate_49' 0
+C 'ft/t_assert_ctl_arg.vl49n42pagev_user/tocover_observed_deferred_immediate_49htop.t.cover_observed_deferred_immediate_49' 0
+C 'ft/t_assert_ctl_arg.vl49n44pagev_user/tocover_final_deferred_immediate_stmt_49htop.t.cover_final_deferred_immediate_stmt_49' 0
+C 'ft/t_assert_ctl_arg.vl49n47pagev_user/tocover_observed_deferred_immediate_stmt_49htop.t.cover_observed_deferred_immediate_stmt_49' 0
+C 'ft/t_assert_ctl_arg.vl51n31pagev_user/tocover_simple_immediate_51htop.t.cover_simple_immediate_51' 0
+C 'ft/t_assert_ctl_arg.vl51n36pagev_user/tocover_simple_immediate_stmt_51htop.t.cover_simple_immediate_stmt_51' 0
+C 'ft/t_assert_ctl_arg.vl51n39pagev_user/tocover_final_deferred_immediate_51htop.t.cover_final_deferred_immediate_51' 0
+C 'ft/t_assert_ctl_arg.vl51n42pagev_user/tocover_observed_deferred_immediate_51htop.t.cover_observed_deferred_immediate_51' 0
+C 'ft/t_assert_ctl_arg.vl51n44pagev_user/tocover_final_deferred_immediate_stmt_51htop.t.cover_final_deferred_immediate_stmt_51' 0
+C 'ft/t_assert_ctl_arg.vl51n47pagev_user/tocover_observed_deferred_immediate_stmt_51htop.t.cover_observed_deferred_immediate_stmt_51' 0
+C 'ft/t_assert_ctl_arg.vl56n31pagev_user/tocover_simple_immediate_56htop.t.cover_simple_immediate_56' 0
+C 'ft/t_assert_ctl_arg.vl56n36pagev_user/tocover_simple_immediate_stmt_56htop.t.cover_simple_immediate_stmt_56' 0
+C 'ft/t_assert_ctl_arg.vl56n39pagev_user/tocover_final_deferred_immediate_56htop.t.cover_final_deferred_immediate_56' 0
+C 'ft/t_assert_ctl_arg.vl56n42pagev_user/tocover_observed_deferred_immediate_56htop.t.cover_observed_deferred_immediate_56' 1
+C 'ft/t_assert_ctl_arg.vl56n44pagev_user/tocover_final_deferred_immediate_stmt_56htop.t.cover_final_deferred_immediate_stmt_56' 0
+C 'ft/t_assert_ctl_arg.vl56n47pagev_user/tocover_observed_deferred_immediate_stmt_56htop.t.cover_observed_deferred_immediate_stmt_56' 1
+C 'ft/t_assert_ctl_arg.vl58n31pagev_user/tocover_simple_immediate_58htop.t.cover_simple_immediate_58' 0
+C 'ft/t_assert_ctl_arg.vl58n36pagev_user/tocover_simple_immediate_stmt_58htop.t.cover_simple_immediate_stmt_58' 0
+C 'ft/t_assert_ctl_arg.vl58n39pagev_user/tocover_final_deferred_immediate_58htop.t.cover_final_deferred_immediate_58' 0
+C 'ft/t_assert_ctl_arg.vl58n42pagev_user/tocover_observed_deferred_immediate_58htop.t.cover_observed_deferred_immediate_58' 0
+C 'ft/t_assert_ctl_arg.vl58n44pagev_user/tocover_final_deferred_immediate_stmt_58htop.t.cover_final_deferred_immediate_stmt_58' 0
+C 'ft/t_assert_ctl_arg.vl58n47pagev_user/tocover_observed_deferred_immediate_stmt_58htop.t.cover_observed_deferred_immediate_stmt_58' 0
+C 'ft/t_assert_ctl_arg.vl63n31pagev_user/tocover_simple_immediate_63htop.t.cover_simple_immediate_63' 0
+C 'ft/t_assert_ctl_arg.vl63n36pagev_user/tocover_simple_immediate_stmt_63htop.t.cover_simple_immediate_stmt_63' 0
+C 'ft/t_assert_ctl_arg.vl63n39pagev_user/tocover_final_deferred_immediate_63htop.t.cover_final_deferred_immediate_63' 1
+C 'ft/t_assert_ctl_arg.vl63n42pagev_user/tocover_observed_deferred_immediate_63htop.t.cover_observed_deferred_immediate_63' 0
+C 'ft/t_assert_ctl_arg.vl63n44pagev_user/tocover_final_deferred_immediate_stmt_63htop.t.cover_final_deferred_immediate_stmt_63' 1
+C 'ft/t_assert_ctl_arg.vl63n47pagev_user/tocover_observed_deferred_immediate_stmt_63htop.t.cover_observed_deferred_immediate_stmt_63' 0
+C 'ft/t_assert_ctl_arg.vl65n31pagev_user/tocover_simple_immediate_65htop.t.cover_simple_immediate_65' 0
+C 'ft/t_assert_ctl_arg.vl65n36pagev_user/tocover_simple_immediate_stmt_65htop.t.cover_simple_immediate_stmt_65' 0
+C 'ft/t_assert_ctl_arg.vl65n39pagev_user/tocover_final_deferred_immediate_65htop.t.cover_final_deferred_immediate_65' 0
+C 'ft/t_assert_ctl_arg.vl65n42pagev_user/tocover_observed_deferred_immediate_65htop.t.cover_observed_deferred_immediate_65' 0
+C 'ft/t_assert_ctl_arg.vl65n44pagev_user/tocover_final_deferred_immediate_stmt_65htop.t.cover_final_deferred_immediate_stmt_65' 0
+C 'ft/t_assert_ctl_arg.vl65n47pagev_user/tocover_observed_deferred_immediate_stmt_65htop.t.cover_observed_deferred_immediate_stmt_65' 0
+C 'ft/t_assert_ctl_arg.vl69n31pagev_user/tocover_simple_immediate_69htop.t.cover_simple_immediate_69' 0
+C 'ft/t_assert_ctl_arg.vl69n36pagev_user/tocover_simple_immediate_stmt_69htop.t.cover_simple_immediate_stmt_69' 0
+C 'ft/t_assert_ctl_arg.vl69n39pagev_user/tocover_final_deferred_immediate_69htop.t.cover_final_deferred_immediate_69' 0
+C 'ft/t_assert_ctl_arg.vl69n42pagev_user/tocover_observed_deferred_immediate_69htop.t.cover_observed_deferred_immediate_69' 0
+C 'ft/t_assert_ctl_arg.vl69n44pagev_user/tocover_final_deferred_immediate_stmt_69htop.t.cover_final_deferred_immediate_stmt_69' 0
+C 'ft/t_assert_ctl_arg.vl69n47pagev_user/tocover_observed_deferred_immediate_stmt_69htop.t.cover_observed_deferred_immediate_stmt_69' 0
+C 'ft/t_assert_ctl_arg.vl71n31pagev_user/tocover_simple_immediate_71htop.t.cover_simple_immediate_71' 1
+C 'ft/t_assert_ctl_arg.vl71n36pagev_user/tocover_simple_immediate_stmt_71htop.t.cover_simple_immediate_stmt_71' 1
+C 'ft/t_assert_ctl_arg.vl71n39pagev_user/tocover_final_deferred_immediate_71htop.t.cover_final_deferred_immediate_71' 1
+C 'ft/t_assert_ctl_arg.vl71n42pagev_user/tocover_observed_deferred_immediate_71htop.t.cover_observed_deferred_immediate_71' 1
+C 'ft/t_assert_ctl_arg.vl71n44pagev_user/tocover_final_deferred_immediate_stmt_71htop.t.cover_final_deferred_immediate_stmt_71' 1
+C 'ft/t_assert_ctl_arg.vl71n47pagev_user/tocover_observed_deferred_immediate_stmt_71htop.t.cover_observed_deferred_immediate_stmt_71' 1
+C 'ft/t_assert_ctl_arg.vl73n31pagev_user/tocover_simple_immediate_73htop.t.cover_simple_immediate_73' 0
+C 'ft/t_assert_ctl_arg.vl73n36pagev_user/tocover_simple_immediate_stmt_73htop.t.cover_simple_immediate_stmt_73' 0
+C 'ft/t_assert_ctl_arg.vl73n39pagev_user/tocover_final_deferred_immediate_73htop.t.cover_final_deferred_immediate_73' 0
+C 'ft/t_assert_ctl_arg.vl73n42pagev_user/tocover_observed_deferred_immediate_73htop.t.cover_observed_deferred_immediate_73' 0
+C 'ft/t_assert_ctl_arg.vl73n44pagev_user/tocover_final_deferred_immediate_stmt_73htop.t.cover_final_deferred_immediate_stmt_73' 0
+C 'ft/t_assert_ctl_arg.vl73n47pagev_user/tocover_observed_deferred_immediate_stmt_73htop.t.cover_observed_deferred_immediate_stmt_73' 0
+C 'ft/t_assert_ctl_arg.vl76n31pagev_user/tocover_simple_immediate_76htop.t.cover_simple_immediate_76' 1
+C 'ft/t_assert_ctl_arg.vl76n36pagev_user/tocover_simple_immediate_stmt_76htop.t.cover_simple_immediate_stmt_76' 1
+C 'ft/t_assert_ctl_arg.vl76n39pagev_user/tocover_final_deferred_immediate_76htop.t.cover_final_deferred_immediate_76' 0
+C 'ft/t_assert_ctl_arg.vl76n42pagev_user/tocover_observed_deferred_immediate_76htop.t.cover_observed_deferred_immediate_76' 1
+C 'ft/t_assert_ctl_arg.vl76n44pagev_user/tocover_final_deferred_immediate_stmt_76htop.t.cover_final_deferred_immediate_stmt_76' 0
+C 'ft/t_assert_ctl_arg.vl76n47pagev_user/tocover_observed_deferred_immediate_stmt_76htop.t.cover_observed_deferred_immediate_stmt_76' 1
+C 'ft/t_assert_ctl_arg.vl78n31pagev_user/tocover_simple_immediate_78htop.t.cover_simple_immediate_78' 1
+C 'ft/t_assert_ctl_arg.vl78n36pagev_user/tocover_simple_immediate_stmt_78htop.t.cover_simple_immediate_stmt_78' 1
+C 'ft/t_assert_ctl_arg.vl78n39pagev_user/tocover_final_deferred_immediate_78htop.t.cover_final_deferred_immediate_78' 1
+C 'ft/t_assert_ctl_arg.vl78n42pagev_user/tocover_observed_deferred_immediate_78htop.t.cover_observed_deferred_immediate_78' 1
+C 'ft/t_assert_ctl_arg.vl78n44pagev_user/tocover_final_deferred_immediate_stmt_78htop.t.cover_final_deferred_immediate_stmt_78' 1
+C 'ft/t_assert_ctl_arg.vl78n47pagev_user/tocover_observed_deferred_immediate_stmt_78htop.t.cover_observed_deferred_immediate_stmt_78' 1
+C 'ft/t_assert_ctl_arg.vl80n31pagev_user/tocover_simple_immediate_80htop.t.cover_simple_immediate_80' 1
+C 'ft/t_assert_ctl_arg.vl80n36pagev_user/tocover_simple_immediate_stmt_80htop.t.cover_simple_immediate_stmt_80' 1
+C 'ft/t_assert_ctl_arg.vl80n39pagev_user/tocover_final_deferred_immediate_80htop.t.cover_final_deferred_immediate_80' 0
+C 'ft/t_assert_ctl_arg.vl80n42pagev_user/tocover_observed_deferred_immediate_80htop.t.cover_observed_deferred_immediate_80' 0
+C 'ft/t_assert_ctl_arg.vl80n44pagev_user/tocover_final_deferred_immediate_stmt_80htop.t.cover_final_deferred_immediate_stmt_80' 0
+C 'ft/t_assert_ctl_arg.vl80n47pagev_user/tocover_observed_deferred_immediate_stmt_80htop.t.cover_observed_deferred_immediate_stmt_80' 0
+C 'ft/t_assert_ctl_arg.vl82n31pagev_user/tocover_simple_immediate_82htop.t.cover_simple_immediate_82' 1
+C 'ft/t_assert_ctl_arg.vl82n36pagev_user/tocover_simple_immediate_stmt_82htop.t.cover_simple_immediate_stmt_82' 1
+C 'ft/t_assert_ctl_arg.vl82n39pagev_user/tocover_final_deferred_immediate_82htop.t.cover_final_deferred_immediate_82' 0
+C 'ft/t_assert_ctl_arg.vl82n42pagev_user/tocover_observed_deferred_immediate_82htop.t.cover_observed_deferred_immediate_82' 0
+C 'ft/t_assert_ctl_arg.vl82n44pagev_user/tocover_final_deferred_immediate_stmt_82htop.t.cover_final_deferred_immediate_stmt_82' 0
+C 'ft/t_assert_ctl_arg.vl82n47pagev_user/tocover_observed_deferred_immediate_stmt_82htop.t.cover_observed_deferred_immediate_stmt_82' 0
+C 'ft/t_assert_ctl_arg.vl84n31pagev_user/tocover_simple_immediate_84htop.t.cover_simple_immediate_84' 0
+C 'ft/t_assert_ctl_arg.vl84n36pagev_user/tocover_simple_immediate_stmt_84htop.t.cover_simple_immediate_stmt_84' 0
+C 'ft/t_assert_ctl_arg.vl84n39pagev_user/tocover_final_deferred_immediate_84htop.t.cover_final_deferred_immediate_84' 0
+C 'ft/t_assert_ctl_arg.vl84n42pagev_user/tocover_observed_deferred_immediate_84htop.t.cover_observed_deferred_immediate_84' 0
+C 'ft/t_assert_ctl_arg.vl84n44pagev_user/tocover_final_deferred_immediate_stmt_84htop.t.cover_final_deferred_immediate_stmt_84' 0
+C 'ft/t_assert_ctl_arg.vl84n47pagev_user/tocover_observed_deferred_immediate_stmt_84htop.t.cover_observed_deferred_immediate_stmt_84' 0
+C 'ft/t_assert_ctl_arg.vl86n31pagev_user/tocover_simple_immediate_86htop.t.cover_simple_immediate_86' 1
+C 'ft/t_assert_ctl_arg.vl86n36pagev_user/tocover_simple_immediate_stmt_86htop.t.cover_simple_immediate_stmt_86' 1
+C 'ft/t_assert_ctl_arg.vl86n39pagev_user/tocover_final_deferred_immediate_86htop.t.cover_final_deferred_immediate_86' 0
+C 'ft/t_assert_ctl_arg.vl86n42pagev_user/tocover_observed_deferred_immediate_86htop.t.cover_observed_deferred_immediate_86' 0
+C 'ft/t_assert_ctl_arg.vl86n44pagev_user/tocover_final_deferred_immediate_stmt_86htop.t.cover_final_deferred_immediate_stmt_86' 0
+C 'ft/t_assert_ctl_arg.vl86n47pagev_user/tocover_observed_deferred_immediate_stmt_86htop.t.cover_observed_deferred_immediate_stmt_86' 0
+C 'ft/t_assert_ctl_arg.vl88n31pagev_user/tocover_simple_immediate_88htop.t.cover_simple_immediate_88' 0
+C 'ft/t_assert_ctl_arg.vl88n36pagev_user/tocover_simple_immediate_stmt_88htop.t.cover_simple_immediate_stmt_88' 0
+C 'ft/t_assert_ctl_arg.vl88n39pagev_user/tocover_final_deferred_immediate_88htop.t.cover_final_deferred_immediate_88' 0
+C 'ft/t_assert_ctl_arg.vl88n42pagev_user/tocover_observed_deferred_immediate_88htop.t.cover_observed_deferred_immediate_88' 0
+C 'ft/t_assert_ctl_arg.vl88n44pagev_user/tocover_final_deferred_immediate_stmt_88htop.t.cover_final_deferred_immediate_stmt_88' 0
+C 'ft/t_assert_ctl_arg.vl88n47pagev_user/tocover_observed_deferred_immediate_stmt_88htop.t.cover_observed_deferred_immediate_stmt_88' 0
+C 'ft/t_assert_ctl_arg.vl90n31pagev_user/tocover_simple_immediate_90htop.t.cover_simple_immediate_90' 1
+C 'ft/t_assert_ctl_arg.vl90n36pagev_user/tocover_simple_immediate_stmt_90htop.t.cover_simple_immediate_stmt_90' 1
+C 'ft/t_assert_ctl_arg.vl90n39pagev_user/tocover_final_deferred_immediate_90htop.t.cover_final_deferred_immediate_90' 1
+C 'ft/t_assert_ctl_arg.vl90n42pagev_user/tocover_observed_deferred_immediate_90htop.t.cover_observed_deferred_immediate_90' 1
+C 'ft/t_assert_ctl_arg.vl90n44pagev_user/tocover_final_deferred_immediate_stmt_90htop.t.cover_final_deferred_immediate_stmt_90' 1
+C 'ft/t_assert_ctl_arg.vl90n47pagev_user/tocover_observed_deferred_immediate_stmt_90htop.t.cover_observed_deferred_immediate_stmt_90' 1
+C 'ft/t_assert_ctl_arg.vl92n31pagev_user/tocover_simple_immediate_92htop.t.cover_simple_immediate_92' 0
+C 'ft/t_assert_ctl_arg.vl92n36pagev_user/tocover_simple_immediate_stmt_92htop.t.cover_simple_immediate_stmt_92' 0
+C 'ft/t_assert_ctl_arg.vl92n39pagev_user/tocover_final_deferred_immediate_92htop.t.cover_final_deferred_immediate_92' 0
+C 'ft/t_assert_ctl_arg.vl92n42pagev_user/tocover_observed_deferred_immediate_92htop.t.cover_observed_deferred_immediate_92' 0
+C 'ft/t_assert_ctl_arg.vl92n44pagev_user/tocover_final_deferred_immediate_stmt_92htop.t.cover_final_deferred_immediate_stmt_92' 0
+C 'ft/t_assert_ctl_arg.vl92n47pagev_user/tocover_observed_deferred_immediate_stmt_92htop.t.cover_observed_deferred_immediate_stmt_92' 0
+C 'ft/t_assert_ctl_arg.vl97n31pagev_user/tocover_simple_immediate_97htop.t.cover_simple_immediate_97' 0
+C 'ft/t_assert_ctl_arg.vl97n36pagev_user/tocover_simple_immediate_stmt_97htop.t.cover_simple_immediate_stmt_97' 0
+C 'ft/t_assert_ctl_arg.vl97n39pagev_user/tocover_final_deferred_immediate_97htop.t.cover_final_deferred_immediate_97' 0
+C 'ft/t_assert_ctl_arg.vl97n42pagev_user/tocover_observed_deferred_immediate_97htop.t.cover_observed_deferred_immediate_97' 0
+C 'ft/t_assert_ctl_arg.vl97n44pagev_user/tocover_final_deferred_immediate_stmt_97htop.t.cover_final_deferred_immediate_stmt_97' 0
+C 'ft/t_assert_ctl_arg.vl97n47pagev_user/tocover_observed_deferred_immediate_stmt_97htop.t.cover_observed_deferred_immediate_stmt_97' 0
diff --git a/test_regress/t/t_assert_ctl_arg.py b/test_regress/t/t_assert_ctl_arg.py
index 85f803217..d376b9136 100755
--- a/test_regress/t/t_assert_ctl_arg.py
+++ b/test_regress/t/t_assert_ctl_arg.py
@@ -19,6 +19,6 @@ test.compile(
 
 test.execute(all_run_flags=["+verilator+error+limit+100"], expect_filename=test.golden_filename)
 
-test.files_identical(test.coverage_filename, test.t_dir + "/t_assert_ctl_arg.coverage.out")
+test.files_identical(test.coverage_filename, test.t_dir + "/t_assert_ctl_arg.dat.out")
 
 test.passes()
