From e965fb92de27b3d15316d745f95747bb51775a5b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 31 May 2026 17:25:28 -0400
Subject: [PATCH] Fix skipping nulls in $sscanf (#7689).

Fixes #7689.
---
 Changes                       |  1 +
 include/verilated.cpp         |  3 +--
 test_regress/t/t_sys_sscanf.v | 11 +++++++++++
 3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/Changes b/Changes
index dfa36aa55..6673bc344 100644
--- a/Changes
+++ b/Changes
@@ -110,6 +110,7 @@ Verilator 5.049 devel
 * Fix width of unsized literal in property expression (#7668). [Artur Bieniek, Antmicro Ltd.]
 * Fix loss of events due to bit shift (#7670). [Artur Bieniek, Antmicro Ltd.]
 * Fix parameter read through locally-declared interface instance (#7679). [Nick Brereton]
+* Fix skipping nulls in $sscanf (#7689).
 
 
 Verilator 5.048 2026-04-26
diff --git a/include/verilated.cpp b/include/verilated.cpp
index 7aeeedea0..3a6d4e746 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -1396,7 +1396,7 @@ static void _vl_vsss_skipspace(FILE* fp, int& floc, const WDataInP fromp,
                                const std::string& fstr) VL_MT_SAFE {
     while (true) {
         const int c = _vl_vsss_peek(fp, floc, fromp, fstr);
-        if (c == EOF || !std::isspace(c)) return;
+        if (c == EOF || !(std::isspace(c) || c == '\0')) return;
         _vl_vsss_advance(fp, floc);
     }
 }
@@ -1413,7 +1413,6 @@ static void _vl_vsss_read_str(FILE* fp, int& floc, const WDataInP fromp, const s
         *cp++ = c;
         _vl_vsss_advance(fp, floc);
     }
-    // VL_DBG_MSGF(" _read got='"<<tmpp<<"'\n");
 }
 static char* _vl_vsss_read_bin(FILE* fp, int& floc, const WDataInP fromp, const std::string& fstr,
                                char* beginp, std::size_t n,
diff --git a/test_regress/t/t_sys_sscanf.v b/test_regress/t/t_sys_sscanf.v
index 58fdca399..7edfa0228 100644
--- a/test_regress/t/t_sys_sscanf.v
+++ b/test_regress/t/t_sys_sscanf.v
@@ -7,6 +7,7 @@
 // verilog_format: off
 `define stop $stop
 `define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+`define checks(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d:  got='%s' exp='%s'\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
 // verilog_format: on
 
 module t;
@@ -18,12 +19,22 @@ module t;
   logic [XLEN-1:0] val;
   int code;
 
+  reg [255:0] line;
+  reg [63:0] token;
+
   initial begin
     // All digits after % is to get line coverage in verilated.cpp
     code = $sscanf("P20=4cff0000", "P%h=%80123456789h", idx, val);
     `checkh(code, 2);
     `checkh(idx, 32'h20);
     `checkh(val, 32'h4cff0000);
+
+    line = "Hello 1 2 3";
+    code = $sscanf(line, "%s %x\n", token, idx);
+    `checkh(code, 2);
+    `checks(token, "\0\0\0Hello");
+    `checkh(idx, 1);
+
     $finish;
   end