diff --git a/test_regress/t/t_dist_warn_coverage.py b/test_regress/t/t_dist_warn_coverage.py
index 35a6bb608..8d35ab603 100755
--- a/test_regress/t/t_dist_warn_coverage.py
+++ b/test_regress/t/t_dist_warn_coverage.py
@@ -68,7 +68,7 @@ for s in [
         'Unsupported: 4-state numbers in this context',
         'Unsupported: Bind with instance list',
         'Unsupported: Concatenation to form ',
-        'Unsupported: Modport dotted port name',
+        'Unsupported: Modport empty expression',
         'Unsupported: Modport export with prototype',
         'Unsupported: Modport import with prototype',
         'Unsupported: Only one PSL clock allowed per assertion',
diff --git a/test_regress/t/t_interface_modport_expr.v b/test_regress/t/t_interface_modport_expr.v
index cb735831e..112403ef7 100644
--- a/test_regress/t/t_interface_modport_expr.v
+++ b/test_regress/t/t_interface_modport_expr.v
@@ -11,7 +11,7 @@
 
 interface my_if;
   logic sig_a, sig_b, sig_c, sig_d;
-  
+
   modport mp1(input .a(sig_a), output .b(sig_b));
   modport mp2(input .a(sig_c), output .b(sig_d));
 endinterface
diff --git a/test_regress/t/t_interface_modport_expr_partsel.v b/test_regress/t/t_interface_modport_expr_partsel.v
index 484b5c604..e18b2bb43 100644
--- a/test_regress/t/t_interface_modport_expr_partsel.v
+++ b/test_regress/t/t_interface_modport_expr_partsel.v
@@ -12,7 +12,7 @@
 interface my_if;
   logic [15:0] a;
   logic [7:0] b, c;
-  
+
   modport mp1(input .in(a[7:0]), output .out(b));
   modport mp2(input .in(a[15:8]), output .out(c));
 endinterface