diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index ed078eee6..fbc38ff84 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -1284,26 +1284,33 @@ void V3Gate::gateAll(AstNetlist* netlistp) {
         graphp->removeRedundantEdgesSum(&V3GraphEdge::followAlwaysTrue);
         if (dumpGraphLevel() >= 6) graphp->dumpDotFilePrefixed("gate_simp");
 
-        // Inline variables
+        // Inline variables (CRITICAL for downstream scheduling)
         GateInline::apply(*graphp);
         if (dumpGraphLevel() >= 6) graphp->dumpDotFilePrefixed("gate_inline");
 
-        // Remove redundant logic
-        if (v3Global.opt.fDedupe()) {
-            GateDedupe::apply(*graphp);
-            if (dumpGraphLevel() >= 6) graphp->dumpDotFilePrefixed("gate_dedup");
-        }
+        // --- NON-CRITICAL OPTIMIZATIONS ---
+        // Only run these aggressive logic reducers if gate optimization is enabled
+        if (v3Global.opt.fGate()) {
+            
+            // Remove redundant logic
+            if (v3Global.opt.fDedupe()) {
+                GateDedupe::apply(*graphp);
+                if (dumpGraphLevel() >= 6) graphp->dumpDotFilePrefixed("gate_dedup");
+            }
 
-        // Merge assignments
-        if (v3Global.opt.fAssemble()) {
-            GateMergeAssignments::apply(*graphp);
-            if (dumpGraphLevel() >= 6) graphp->dumpDotFilePrefixed("gate_merge");
-        }
+            // Merge assignments
+            if (v3Global.opt.fAssemble()) {
+                GateMergeAssignments::apply(*graphp);
+                if (dumpGraphLevel() >= 6) graphp->dumpDotFilePrefixed("gate_merge");
+            }
 
-        // Remove unused logic
-        GateUnused::apply(*graphp);
-        if (dumpGraphLevel() >= 3) graphp->dumpDotFilePrefixed("gate_final");
+            // Remove unused logic
+            GateUnused::apply(*graphp);
+            if (dumpGraphLevel() >= 3) graphp->dumpDotFilePrefixed("gate_final");
+            
+        } // End of fGate() check
     }
 
     V3Global::dumpCheckGlobalTree("gate", 0, dumpTreeEitherLevel() >= 3);
 }
+
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 50a4dcf0f..c4fbeb1fc 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -420,12 +420,13 @@ static void process() {
 
             // Gate-based logic elimination; eliminate signals and push constant across cell
             // boundaries Instant propagation makes lots-o-constant reduction possibilities.
-            if (v3Global.opt.fGate()) {
-                V3Gate::gateAll(v3Global.rootp());
-                // V3Gate calls constant propagation itself.
-            } else {
-                v3info("Command Line disabled gate optimization with -fno-gate.  "
-                       "This may cause ordering problems.");
+            // Always run gateAll to perform critical downstream normalizations
+            // (like GateInline) even if fGate is false.
+            V3Gate::gateAll(v3Global.rootp());
+            
+            if (!v3Global.opt.fGate()) {
+                v3info("Command Line disabled gate optimization with -fno-gate. "
+                       "Only critical normalizations will be performed.");
             }
 
             // Combine COVERINCs with duplicate terms