diff --git a/bin/verilator b/bin/verilator
index 0cc2083d1..d643ae7bc 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -477,7 +477,7 @@ detailed descriptions of these arguments.
     --trace-coverage            Enable tracing of coverage
     --trace-depth <levels>      Depth of tracing
     --trace-fst                 Enable FST waveform creation
-    --trace-saif                Enable SAIF trace file creation
+    --trace-saif                Enable SAIF file creation
     --trace-max-array <depth>   Maximum array depth for tracing
     --trace-max-width <width>   Maximum bit width for tracing
     --trace-params              Enable tracing of parameters
diff --git a/include/verilated_saif_c.cpp b/include/verilated_saif_c.cpp
index e6ddc6311..3ef5ef06b 100644
--- a/include/verilated_saif_c.cpp
+++ b/include/verilated_saif_c.cpp
@@ -259,7 +259,6 @@ void VerilatedSaif::recursivelyPrintScopes(uint32_t scopeIndex) {
 
     bool anyNetValid{false};
 
-    //NOTE: for now only care about NET, also PORT will be added
     for (auto& childSignal : saifScope.childSignals) {
         uint32_t code = childSignal.first;
         const char* name = childSignal.second.c_str();
@@ -292,6 +291,8 @@ void VerilatedSaif::recursivelyPrintScopes(uint32_t scopeIndex) {
                 printStr(std::to_string(i).c_str());
                 printStr("\\]");
             }
+
+            // We only have two-value logic so TZ, TX and TB will always be 0
             printStr(" (T0 ");
             printStr(std::to_string(m_time - bit.highTime).c_str());
             printStr(") (T1 ");
@@ -299,9 +300,6 @@ void VerilatedSaif::recursivelyPrintScopes(uint32_t scopeIndex) {
             printStr(") (TZ 0) (TX 0) (TB 0) (TC ");
             printStr(std::to_string(bit.transitions).c_str());
             printStr("))\n");
-
-            // NOTE: TZ, TX and TB will be allways 0
-            // NOTE: I.3.4 and I.3.5 mentions also about TG, IG and IK
         }
         activity.lastTime = m_time;
     }