From d359a9ce3c67c1d823dddc0c9769d5eccbc20dfe Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 22 Aug 2026 10:47:46 -0400
Subject: [PATCH] Commentary: Changes update

---
 Changes                                | 8 ++++++++
 test_regress/t/t_pattern_array_queue.v | 2 +-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/Changes b/Changes
index dbea1ed4d..8ff7323eb 100644
--- a/Changes
+++ b/Changes
@@ -28,6 +28,7 @@ Verilator 5.051 devel
 * Add FSM arc and state coverage to verilator_coverage .info output (#7972) (#7973). [Igor Zaworski, Antmicro Ltd.]
 * Add SIMILARNAME warning when variables have names that only differ in lexical case (#7992) (#8020). [Paul Campbell]
 * Add `+verilator+assert+lock` to ignore RTL assert control statements (#8086). [Sumanth Kadiyala]
+* Add NEVERMATCH warning when an SVA sequence can never match (#8176) (#8183). [Artur Bieniek, Antmicro Ltd.]
 * Support embedded covergroup member references (#7749) (#8015). [Marco Bartoli]
 * Support a sequence used as an event control (#7797) (#7846). [Yilou Wang]
 * Support `[\*N:$]` consecutive repetition (#7940). [Artur Bieniek, Antmicro Ltd.]
@@ -37,6 +38,7 @@ Verilator 5.051 devel
 * Support embedded covergroup clocking events (#8028). [Marco Bartoli]
 * Support `weak`/`strong` keywords in property expressions (#8054). [Artur Bieniek, Antmicro Ltd.]
 * Support class handle covergroup arguments (#8071). [Marco Bartoli]
+* Support overlong `within` sequences as never-matching (#8177). [Artur Bieniek, Antmicro Ltd.]
 * Optimize random initialization. [Geza Lore, Testorrent USA, Inc.]
 * Optimize more always blocks in DFG (#7775). [Geza Lore, Testorrent USA, Inc.]
 * Optimize assertion NFAs using bit-vector ring buffers (#7885). [Artur Bieniek, Antmicro Ltd.]
@@ -141,6 +143,12 @@ Verilator 5.051 devel
 * Fix 'get-value' for empty constrained arrays (#8138). [Kornel Uriasz, Antmicro Ltd.]
 * Fix streaming concatenation uninitialized RMW access (#8143). [Geza Lore, Testorrent USA, Inc.]
 * Fix unpacked array passing to logic task argument error (#8148). [Pawel Klopotek, Antmicro Ltd.]
+* Fix array reference in reduction constraints (#8158). [Kornel Uriasz, Antmicro Ltd.]
+* Fix null pointer dereference in process destruction (#8171). [Andrii, Antmicro Ltd.]
+* Fix invalid conversion of queue (#8172). [Andrii, Antmicro Ltd.]
+* Fix crash on forward-referencing parameters (#8175). [Geza Lore, Testorrent USA, Inc.]
+* Fix crash on empty `#()` parameter list on class instance (#8182). [Geza Lore, Testorrent USA, Inc.]
+* Fix crash on multiple missing type parameters (#8184). [Geza Lore, Testorrent USA, Inc.]
 
 
 Verilator 5.050 2026-07-01
diff --git a/test_regress/t/t_pattern_array_queue.v b/test_regress/t/t_pattern_array_queue.v
index 9799321e2..27e008830 100644
--- a/test_regress/t/t_pattern_array_queue.v
+++ b/test_regress/t/t_pattern_array_queue.v
@@ -9,7 +9,7 @@
 `define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0d exp=%0d (%s !== %s)\n", `__FILE__,`__LINE__, (gotv), (expv), `"gotv`", `"expv`"); `stop; end while(0);
 // verilog_format: on
 
-module t();
+module t;
   byte array1[];
   byte array2[];
   byte queue1[$];