diff --git a/Changes b/Changes
index d0c593956..cda7ce9b7 100644
--- a/Changes
+++ b/Changes
@@ -12,6 +12,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 **** Report error if port declaration is missing; bug32. [Guy-Armand Kamendje]
 
+**** Fix genvars causing link error when using --public.  [Chris Candler]
+
 * Verilator 3.671 2008/09/19
 
 **   SystemC uint64_t pins are now the default instead of sc_bv<64>.
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 6213d1a46..d7f96941e 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -47,7 +47,7 @@ int AstNodeSel::bitConst() const {
 }
 
 bool AstVar::isSigPublic() const {
-    return (m_sigPublic || (v3Global.opt.allPublic() && !isTemp()));
+    return (m_sigPublic || (v3Global.opt.allPublic() && !isTemp() && !isGenVar()));
 }
 
 bool AstVar::isScQuad() const {
diff --git a/test_sc/Makefile b/test_sc/Makefile
index 47e7a54a5..7a0affa48 100644
--- a/test_sc/Makefile
+++ b/test_sc/Makefile
@@ -25,7 +25,6 @@ DEBUG_ON = --debug
 ######################################################################
 test_default:  precopy prep        preproc compile run
 test_debug:    precopy prep_dbg    preproc compile run
-test_nopublic: precopy prep_dbg_np preproc compile run
 
 V_FLAGS = -f $(VERILATOR_ROOT)/test_v/input.vc
 VERILATOR_FLAGS = --sc $(V_FLAGS) top.v
@@ -39,8 +38,6 @@ prep:
 	$(PERL) $(VERILATOR_ROOT)/bin/verilator             $(VERILATOR_FLAGS)
 prep_dbg:
 	$(PERL) $(VERILATOR_ROOT)/bin/verilator $(DEBUG_ON) $(VERILATOR_FLAGS)
-prep_dbg_np:
-	$(PERL) $(VERILATOR_ROOT)/bin/verilator $(DEBUG_ON) $(VERILATOR_FLAGS) --nopublic
 
 preproc:
 	cd obj_dir ; $(MAKE) -j 1 -f ../Makefile_obj preproc
diff --git a/test_v/t_inst.v b/test_v/t_inst.v
index 49fcc4d3e..7832cc523 100644
--- a/test_v/t_inst.v
+++ b/test_v/t_inst.v
@@ -14,6 +14,8 @@ module t_inst(/*AUTOARG*/
    input fastclk;
    output passed;  reg passed; initial passed = 0;
 
+   genvar unused;
+
    /*AUTOWIRE*/
    // Beginning of automatic wires (for undeclared instantiated-module outputs)
    wire			o_com;			// From b of t_inst_b.v