From cdab9479b8a45d56388aa8bfd473616f99427dd7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= Date: Wed, 26 Mar 2025 12:05:18 +0100 Subject: [PATCH] Commentary: Fix bugpoint link (#5883) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Bartłomiej Chmiel --- docs/guide/contributing.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/guide/contributing.rst b/docs/guide/contributing.rst index 5aace3c78..7f71160da 100644 --- a/docs/guide/contributing.rst +++ b/docs/guide/contributing.rst @@ -72,7 +72,7 @@ and the design can be easily manually reduced. In other cases, the bug is caused by a complex interaction of many parts of the design, and it is not clear which parts are necessary to reproduce the bug. In these cases, an Open Source tool called `sv-bugpoint -_` can be used to automatically +`_ can be used to automatically reduce a SystemVerilog design to the smallest possible reproducer. It can be used to automatically reduce a design with hundreds of thousands of lines to a minimal test case while preserving the bug-inducing behavior.