diff --git a/Changes b/Changes
index 2e63a8376..ab9334be1 100644
--- a/Changes
+++ b/Changes
@@ -11,6 +11,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 **** Fix dotted bit reference to local memory.  [Eugene Weber]
 
+**** Fix 3.640 `verilog forcing IEEE 1364-1995 only.  [David Hewson]
+
 * Verilator 3.640 3/12/2007
 
 ***  Support Verilog 2005 `begin_keywords and `end_keywords.
diff --git a/bin/verilator b/bin/verilator
index 2f14a44f3..9892fc161 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -325,9 +325,9 @@ change the SystemC modules instantiated.
 Tune the inlining of modules.  The default value of 2000 specifies that up
 to 2000 new operations may be added to the model by inlining, if more then
 this number of operations would result, the module is not inlined.  Larger
-values, or -1 to inline everything, will lead to longer compile times, but
-potentially faster runtimes.  This setting is ignored for very small
-modules; they will always be inlined, if allowed.
+values, or a value <= 1 will inline everything, will lead to longer compile
+times, but potentially faster runtimes.  This setting is ignored for very
+small modules; they will always be inlined, if allowed.
 
 =item --MMD
 
@@ -1074,7 +1074,9 @@ around compiler specific constructs.
 
 =item `verilog
 
-Switch back to processing Verilog code, after a `systemc_... mode switch.
+Switch back to processing Verilog code after a `systemc_... mode switch.
+The Verilog code returns to the last language mode specified with
+`begin_keywords, or SystemVerilog if none were specified.
 
 =item /*verilator clock_enable*/
 
diff --git a/src/V3Read.h b/src/V3Read.h
index 901a730cf..2bada0b02 100644
--- a/src/V3Read.h
+++ b/src/V3Read.h
@@ -40,6 +40,7 @@ class V3Read {
     FileLine*	m_fileline;	// Filename/linenumber currently active
     bool	m_inLibrary;	// Currently reading a library vs. regular file
     int		m_inBeginKwd;		// Inside a `begin_keywords
+    int		m_lastVerilogState;	// Last LEX state in `begin_keywords
     deque<string*> m_stringps;		// Created strings for later cleanup
     deque<V3Number*> m_numberps;	// Created numbers for later cleanup
     //int debug() { return 9; }
@@ -55,8 +56,9 @@ protected:
     static void incLineno() { s_readp->fileline()->incLineno(); }
     static void verilatorCmtLint(const char* text, bool on);
     static void verilatorCmtBad(const char* text);
-    static void pushBeginKeywords() { s_readp->m_inBeginKwd++; }
+    static void pushBeginKeywords(int state) { s_readp->m_inBeginKwd++; s_readp->m_lastVerilogState=state; }
     static bool popBeginKeywords() { if (s_readp->m_inBeginKwd) { s_readp->m_inBeginKwd--; return true; } else return false; }
+    static int lastVerilogState() { return s_readp->m_lastVerilogState; }
 
 public: // But for internal use only
     static string* newString(const string& text) {
@@ -91,6 +93,7 @@ public: // But for internal use only
     static void stateExitPsl();	// Parser -> lexer communication
     static void statePushVlg();	// Parser -> lexer communication
     static void statePop();	// Parser -> lexer communication
+    static int stateVerilogRecent();	// Parser -> lexer communication
 
 public:
     // CREATORS
@@ -98,6 +101,7 @@ public:
 	m_rootp = rootp; m_lexerp = NULL;
 	m_inLibrary = false;
 	m_inBeginKwd = 0;
+	m_lastVerilogState = stateVerilogRecent();
     }
     ~V3Read() {
 	for (deque<string*>::iterator it = m_stringps.begin(); it != m_stringps.end(); ++it) {
diff --git a/src/verilog.l b/src/verilog.l
index fcfe55168..dd778a229 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -644,7 +644,7 @@ escid	\\[^ \t\f\r\n]+
   /* Common for all SYSC header states */
   /* OPTIMIZE: we return one per line, make it one for the entire block */
 <V95,V01,V05,S05,PSL,SYSCHDR,SYSCINT,SYSCIMP,SYSCIMPH,SYSCCTOR,SYSCDTOR,IGNORE>{
-  [ \t]*"`verilog"			{ BEGIN V95; }
+  [ \t]*"`verilog"			{ BEGIN V3Read::lastVerilogState(); }
   [ \t]*"`psl"				{ if (V3Read::optPsl()) { BEGIN PSL; } else { BEGIN IGNORE; } }
   [ \t]*"`systemc_header"		{ BEGIN SYSCHDR; }
   [ \t]*"`systemc_ctor"			{ BEGIN SYSCCTOR; }
@@ -653,11 +653,11 @@ escid	\\[^ \t\f\r\n]+
   [ \t]*"`systemc_implementation"	{ BEGIN SYSCIMP; }
   [ \t]*"`systemc_imp_header"		{ BEGIN SYSCIMPH; }
 
-  [ \t]*"`begin_keywords"[ \t]*\"1364-1995\"		{ yy_push_state(V95); V3Read::pushBeginKeywords();}
-  [ \t]*"`begin_keywords"[ \t]*\"1364-2001\"		{ yy_push_state(V01); V3Read::pushBeginKeywords();}
-  [ \t]*"`begin_keywords"[ \t]*\"1364-2001-noconfig\"	{ yy_push_state(V01); V3Read::pushBeginKeywords();}
-  [ \t]*"`begin_keywords"[ \t]*\"1364-2005\"		{ yy_push_state(V05); V3Read::pushBeginKeywords();}
-  [ \t]*"`begin_keywords"[ \t]*\"1800-2005\"		{ yy_push_state(S05); V3Read::pushBeginKeywords();}
+  [ \t]*"`begin_keywords"[ \t]*\"1364-1995\"		{ yy_push_state(V95); V3Read::pushBeginKeywords(YY_START);}
+  [ \t]*"`begin_keywords"[ \t]*\"1364-2001\"		{ yy_push_state(V01); V3Read::pushBeginKeywords(YY_START);}
+  [ \t]*"`begin_keywords"[ \t]*\"1364-2001-noconfig\"	{ yy_push_state(V01); V3Read::pushBeginKeywords(YY_START);}
+  [ \t]*"`begin_keywords"[ \t]*\"1364-2005\"		{ yy_push_state(V05); V3Read::pushBeginKeywords(YY_START);}
+  [ \t]*"`begin_keywords"[ \t]*\"1800-2005\"		{ yy_push_state(S05); V3Read::pushBeginKeywords(YY_START);}
   [ \t]*"`end_keywords"					{ yy_pop_state(); if (!V3Read::popBeginKeywords()) yyerrorf("`end_keywords when not inside `begin_keywords block"); }
 
   "`line"[ \t][^\n]*\n			{V3Read::ppline(yytext);}
@@ -691,4 +691,4 @@ escid	\\[^ \t\f\r\n]+
   /* Catch all - absolutely last */
 <*>.|\n     		{ yyerrorf("Missing verilog.l rule: Default rule invoked in state %d: %s", YY_START, yytext); }
 %%
-
+int V3Read::stateVerilogRecent() { return STATE_VERILOG_RECENT; }