From bd1f1e8699998328a1dd7a41c75fd7522e347b5f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 16 Jan 2018 19:53:50 -0500
Subject: [PATCH] Fix compile error on public real parameters by suppressing,
 bug1261.

---
 Changes                              |  2 ++
 src/V3EmitC.cpp                      |  2 ++
 test_regress/t/t_math_real_public.pl | 19 +++++++++++++++++++
 test_regress/t/t_math_real_public.v  | 21 +++++++++++++++++++++
 4 files changed, 44 insertions(+)
 create mode 100755 test_regress/t/t_math_real_public.pl
 create mode 100644 test_regress/t/t_math_real_public.v

diff --git a/Changes b/Changes
index d15fe2cf2..87733dc91 100644
--- a/Changes
+++ b/Changes
@@ -4,6 +4,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
 
 * Verilator 3.919 devel
 
+****  Fix compile error on public real parameters by suppressing, bug1261. [Alex Solomatnikov]
+
 
 * Verilator 3.918 2018-01-02
 
diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp
index 5ecc28a76..ea088f7cd 100644
--- a/src/V3EmitC.cpp
+++ b/src/V3EmitC.cpp
@@ -2040,6 +2040,8 @@ void EmitCImp::emitInt(AstNodeModule* modp) {
 		    putsDecoration("// enum WData "+varp->name()+"  //wide");
 		} else if (!varp->valuep()->castConst()) {   // Unsupported for output
 		    //putsDecoration("// enum ..... "+varp->name()+"  //not simple value, see variable above instead");
+                } else if (varp->dtypep()->castBasicDType()
+                           && varp->dtypep()->castBasicDType()->isOpaque()) {  // Can't put out e.g. doubles
 		} else {
 		    puts("enum ");
 		    puts(varp->isQuad()?"_QData":"_IData");
diff --git a/test_regress/t/t_math_real_public.pl b/test_regress/t/t_math_real_public.pl
new file mode 100755
index 000000000..f6b472c39
--- /dev/null
+++ b/test_regress/t/t_math_real_public.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    verilator_flags2 => ['--cc --public'],
+    );
+
+execute (
+    check_finished=>1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_math_real_public.v b/test_regress/t/t_math_real_public.v
new file mode 100644
index 000000000..4ddb2038b
--- /dev/null
+++ b/test_regress/t/t_math_real_public.v
@@ -0,0 +1,21 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2018 by Alex Solomatnikov
+
+module t;
+   sub #(.REAL(2.0)) sub;
+endmodule
+
+module sub ();
+   timeunit 1ns;
+   timeprecision 1ps;
+
+   parameter REAL = 0.0;
+
+   initial begin
+      $display("REAL %g", REAL);
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule