From b4baa7ce025039a0dbb23f77db23b7f1de695121 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 1 Dec 2023 19:05:21 -0500
Subject: [PATCH] Internals: Avoid extranious base class calls in recent
 commit.

---
 src/astgen                         | 15 ++++++---------
 test_regress/t/t_timing_zerodly.pl |  2 +-
 2 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/src/astgen b/src/astgen
index a689216df..a51d14a3f 100755
--- a/src/astgen
+++ b/src/astgen
@@ -993,11 +993,9 @@ def write_ast_impl(filename):
                 continue
             emitBlock("const char* Ast{t}::brokenGen() const {{\n",
                       t=node.name)
-            for superClass in node.allSuperClasses:
-                if superClass.name != 'Node':
-                    emitBlock(
-                        "    BROKEN_BASE_RTN(Ast{super}::brokenGen());\n",
-                        super=superClass.name)
+            if node.superClass.name != 'Node':
+                emitBlock("    BROKEN_BASE_RTN(Ast{base}::brokenGen());\n",
+                          base=node.superClass.name)
             for ptr in node.ptrs:
                 if ptr['monad'] == 'Optional':
                     emitBlock(
@@ -1011,10 +1009,9 @@ def write_ast_impl(filename):
             emitBlock("    return Ast{t}::broken(); }}\n", t=node.name)
 
             emitBlock("void Ast{t}::cloneRelinkGen() {{\n", t=node.name)
-            for superClass in node.allSuperClasses:
-                if superClass.name != 'Node':
-                    emitBlock("    Ast{super}::cloneRelinkGen();\n",
-                              super=superClass.name)
+            if node.superClass.name != 'Node':
+                emitBlock("    Ast{base}::cloneRelinkGen();\n",
+                          base=node.superClass.name)
             for ptr in node.ptrs:
                 emitBlock(
                     "    if (m_{name} && m_{name}->clonep()) m_{name} = m_{name}->clonep();\n",
diff --git a/test_regress/t/t_timing_zerodly.pl b/test_regress/t/t_timing_zerodly.pl
index 9e4a1a1ff..bbc99cfb6 100755
--- a/test_regress/t/t_timing_zerodly.pl
+++ b/test_regress/t/t_timing_zerodly.pl
@@ -2,7 +2,7 @@
 if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
 # DESCRIPTION: Verilator: Verilog Test driver/expect definition
 #
-# Copyright 2022 by Antmicro Ltd. This program is free software; you
+# Copyright 2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.