From b27bd6526ab574b59a187af213c3af36d0639d5f Mon Sep 17 00:00:00 2001 From: github action Date: Mon, 30 Jun 2025 01:00:56 +0000 Subject: [PATCH] Apply 'make format' --- src/V3LinkCells.cpp | 7 +++---- test_regress/t/t_config_work.py | 5 +++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp index ed3d5872f..87934aa34 100644 --- a/src/V3LinkCells.cpp +++ b/src/V3LinkCells.cpp @@ -615,7 +615,8 @@ class LinkCellsVisitor final : public VNVisitor { nodep->name(hierIt->first); // Change name of this module to be mangled name // considering parameter } - const AstNodeModule* const libFoundp = findModuleLibSym(nodep->origName(), nodep->libname()); + const AstNodeModule* const libFoundp + = findModuleLibSym(nodep->origName(), nodep->libname()); const AstNodeModule* const globalFoundp = findModuleLibSym(nodep->name(), "__GLOBAL"); if (libFoundp && libFoundp == nodep) { // Ok @@ -674,9 +675,7 @@ public: iterate(nodep); } ~LinkCellsVisitor() override { - if (debug() >= 5 || dumpGraphLevel() >= 5) { - m_mods.dumpFilePrefixed("linkcells"); - } + if (debug() >= 5 || dumpGraphLevel() >= 5) { m_mods.dumpFilePrefixed("linkcells"); } } }; diff --git a/test_regress/t/t_config_work.py b/test_regress/t/t_config_work.py index 04abe3314..45a18e197 100755 --- a/test_regress/t/t_config_work.py +++ b/test_regress/t/t_config_work.py @@ -11,8 +11,9 @@ import vltest_bootstrap test.scenarios('simulator') -test.compile( - verilator_flags2=['--binary', '--work liba', 't/t_config_work__liba.v', '--work libb', 't/t_config_work__libb.v']) +test.compile(verilator_flags2=[ + '--binary', '--work liba', 't/t_config_work__liba.v', '--work libb', 't/t_config_work__libb.v' +]) test.execute()