From b10b22d09f62a66674e83b2b0232acbc439949c2 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 30 Apr 2025 18:30:19 -0400 Subject: [PATCH] Change unsupported 'tagged' into parse-level message --- src/verilog.l | 2 +- src/verilog.y | 15 ++++---- test_regress/t/t_tagged.out | 70 +++++++++++++++---------------------- test_regress/t/t_tagged.v | 13 +++++-- 4 files changed, 47 insertions(+), 53 deletions(-) diff --git a/src/verilog.l b/src/verilog.l index a7d60ad55..add1df161 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -581,7 +581,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "string" { FL; return ySTRING; } "struct" { FL; return ySTRUCT; } "super" { FL; return ySUPER; } - "tagged" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "tagged" { FL; return yTAGGED; } "this" { FL; return yTHIS; } "throughout" { FL; return yTHROUGHOUT; } "timeprecision" { FL; return yTIMEPRECISION; } diff --git a/src/verilog.y b/src/verilog.y index 696659c06..f88c4c94a 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -749,7 +749,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"}) %token yS_UNTIL "s_until" %token yS_UNTIL_WITH "s_until_with" %token yTABLE "table" -//UNSUP %token yTAGGED "tagged" +%token yTAGGED "tagged" %token yTASK "task" %token yTHIS "this" %token yTHROUGHOUT "throughout" @@ -1080,7 +1080,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"}) // These prevent other conflicts %left yP_ANDANDAND %left yMATCHES -//UNSUP %left prTAGGED +%left prTAGGED //UNSUP %left prSEQ_CLOCKING // PSL op precedence @@ -2447,7 +2447,7 @@ random_qualifier: // ==IEEE: random_qualifier taggedSoftE: /*empty*/ { $$ = false; } | ySOFT { $$ = true; } - //UNSUP yTAGGED { UNSUP } + | yTAGGED { $$ = false; BBUNSUP($1, "Unsupported: tagged union"); } ; packedSigningE: @@ -4033,8 +4033,8 @@ patternNoExpr: // IEEE: pattern **Excluding Expr* { $$ = nullptr; BBUNSUP($1, "Unsupported: '{} tagged patterns"); } // // IEEE: "expr" excluded; expand in callers // // "yTAGGED idAny [expr]" Already part of expr - //UNSUP yTAGGED idAny/*member_identifier*/ patternNoExpr - //UNSUP { $$ = nullptr; BBUNSUP($1, "Unsupported: '{} tagged patterns"); } + | yTAGGED idAny/*member_identifier*/ patternNoExpr + { $$ = nullptr; BBUNSUP($1, "Unsupported: '{} tagged patterns"); } // // "yP_TICKBRA patternList '}'" part of expr under assignment_pattern ; @@ -5083,8 +5083,9 @@ expr: // IEEE: part of expression/constant_expression/ | ~l~expr yINSIDE '{' range_list '}' { $$ = new AstInside{$2, $1, $4}; } // // // IEEE: tagged_union_expression - //UNSUP yTAGGED id/*member*/ %prec prTAGGED { UNSUP } - //UNSUP yTAGGED id/*member*/ %prec prTAGGED primary { UNSUP } + //UNSUP yTAGGED id/*member*/ %prec prTAGGED { $$ = $2; BBUNSUP("tagged reference"); } + // // Spec only allows primary + //UNSUP yTAGGED id/*member*/ %prec prTAGGED expr /*primary*/ { $$ = $2; BBUNSUP("tagged reference"); } // //======================// IEEE: primary/constant_primary // diff --git a/test_regress/t/t_tagged.out b/test_regress/t/t_tagged.out index 889926ef0..7cf6307f9 100644 --- a/test_regress/t/t_tagged.out +++ b/test_regress/t/t_tagged.out @@ -1,56 +1,42 @@ -%Error-UNSUPPORTED: t/t_tagged.v:9:18: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' +%Error-UNSUPPORTED: t/t_tagged.v:9:18: Unsupported: tagged union 9 | typedef union tagged { | ^~~~~~ ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest %Error-UNSUPPORTED: t/t_tagged.v:10:6: Unsupported: void (for tagged unions) 10 | void m_invalid; | ^~~~ -%Error-UNSUPPORTED: t/t_tagged.v:18:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 18 | u = tagged m_invalid; - | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:22:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 22 | tagged m_invalid: ; - | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:23:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 23 | tagged m_int: $stop; - | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:21:16: Unsupported: matches (for tagged union) - 21 | case (u) matches +%Error: t/t_tagged.v:19:14: syntax error, unexpected tagged, expecting IDENTIFIER-for-type + 19 | u = tagged m_invalid; + | ^~~~~~ + ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance. +%Error-UNSUPPORTED: t/t_tagged.v:24:16: Unsupported: matches (for tagged union) + 24 | case (u) matches | ^~~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:26:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 26 | if (u matches tagged m_invalid) ; +%Error: t/t_tagged.v:29:9: syntax error, unexpected tagged, expecting IDENTIFIER-for-type + 29 | tagged m_invalid: ; + | ^~~~~~ +%Error-UNSUPPORTED: t/t_tagged.v:34:34: Unsupported: '{} tagged patterns + 34 | if (u matches tagged m_int .n) $stop; + | ^ +%Error-UNSUPPORTED: t/t_tagged.v:34:21: Unsupported: '{} tagged patterns + 34 | if (u matches tagged m_int .n) $stop; | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:26:13: Unsupported: matches operator - 26 | if (u matches tagged m_invalid) ; +%Error-UNSUPPORTED: t/t_tagged.v:34:13: Unsupported: matches operator + 34 | if (u matches tagged m_int .n) $stop; | ^~~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:27:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 27 | if (u matches tagged m_int .n) $stop; - | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:27:13: Unsupported: matches operator - 27 | if (u matches tagged m_int .n) $stop; - | ^~~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:29:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 29 | u = tagged m_int (123); +%Error: t/t_tagged.v:36:11: syntax error, unexpected tagged, expecting IDENTIFIER-for-type + 36 | u = tagged m_int (123); | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:33:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 33 | tagged m_invalid: $stop; +%Error: t/t_tagged.v:40:9: syntax error, unexpected tagged, expecting IDENTIFIER-for-type + 40 | tagged m_invalid: $stop; | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:34:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 34 | tagged m_int .n: if (n !== 123) $stop; - | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:32:16: Unsupported: matches (for tagged union) - 32 | case (u) matches - | ^~~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:37:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 37 | if (u matches tagged m_invalid) $stop; +%Error-UNSUPPORTED: t/t_tagged.v:45:34: Unsupported: '{} tagged patterns + 45 | if (u matches tagged m_int .n) if (n != 123) $stop; + | ^ +%Error-UNSUPPORTED: t/t_tagged.v:45:21: Unsupported: '{} tagged patterns + 45 | if (u matches tagged m_int .n) if (n != 123) $stop; | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:37:13: Unsupported: matches operator - 37 | if (u matches tagged m_invalid) $stop; - | ^~~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:38:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' - 38 | if (u matches tagged m_int .n) if (n != 123) $stop; - | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:38:13: Unsupported: matches operator - 38 | if (u matches tagged m_int .n) if (n != 123) $stop; +%Error-UNSUPPORTED: t/t_tagged.v:45:13: Unsupported: matches operator + 45 | if (u matches tagged m_int .n) if (n != 123) $stop; | ^~~~~~~ %Error: Exiting due to diff --git a/test_regress/t/t_tagged.v b/test_regress/t/t_tagged.v index 76bd224cd..6a8f5375f 100644 --- a/test_regress/t/t_tagged.v +++ b/test_regress/t/t_tagged.v @@ -15,9 +15,16 @@ module t(/*AUTOARG*/); string s; initial begin - u = tagged m_invalid; - s = $sformatf("%p", u); - $display("%s e.g. '{tagged m_invalid:void}", s); + begin + u = tagged m_invalid; + s = $sformatf("%p", u); + $display("%s e.g. '{tagged m_invalid:void}", s); + end + + case (u) matches + default: ; + endcase + case (u) matches tagged m_invalid: ; tagged m_int: $stop;