From 75f32601272b8d09a47cc87c8b117138c9f82d46 Mon Sep 17 00:00:00 2001 From: Todd Strader Date: Wed, 18 Feb 2026 16:20:20 -0500 Subject: [PATCH 1/2] Optimize trace code for faster compiles on repeated types (#6707) --- src/V3AstAttr.h | 14 + src/V3AstNodeExpr.h | 1 + src/V3AstNodeOther.h | 6 +- src/V3AstNodeStmt.h | 29 +- src/V3AstNodes.cpp | 7 +- src/V3EmitCBase.cpp | 2 +- src/V3EmitCImp.cpp | 57 +- src/V3Gate.cpp | 2 +- src/V3Trace.cpp | 299 +- src/V3TraceDecl.cpp | 209 +- test_regress/driver.py | 4 +- test_regress/t/t_cast_signed.v | 1 - test_regress/t/t_mem_trace_split.py | 2 +- .../t/t_trace_array_const_no_const.py | 18 + test_regress/t/t_trace_array_const_no_const.v | 40 + test_regress/t/t_trace_complex_2_structs.out | 105 + test_regress/t/t_trace_complex_2_structs.py | 24 + test_regress/t/t_trace_complex_2_structs.v | 41 + test_regress/t/t_trace_complex_3_structs.out | 94 + test_regress/t/t_trace_complex_3_structs.py | 23 + test_regress/t/t_trace_complex_3_structs.v | 42 + test_regress/t/t_trace_huge_array.py | 23 + test_regress/t/t_trace_huge_array.v | 29 + test_regress/t/t_trace_type_alias.py | 18 + test_regress/t/t_trace_type_alias.v | 46 + test_regress/t/t_trace_type_dupes.out | 1522 +++++++ test_regress/t/t_trace_type_dupes.py | 20 + test_regress/t/t_trace_type_dupes.v | 185 + test_regress/t/t_trace_type_dupes_structs.out | 3711 +++++++++++++++++ test_regress/t/t_trace_type_dupes_structs.py | 24 + 30 files changed, 6485 insertions(+), 113 deletions(-) create mode 100755 test_regress/t/t_trace_array_const_no_const.py create mode 100644 test_regress/t/t_trace_array_const_no_const.v create mode 100644 test_regress/t/t_trace_complex_2_structs.out create mode 100755 test_regress/t/t_trace_complex_2_structs.py create mode 100644 test_regress/t/t_trace_complex_2_structs.v create mode 100644 test_regress/t/t_trace_complex_3_structs.out create mode 100755 test_regress/t/t_trace_complex_3_structs.py create mode 100644 test_regress/t/t_trace_complex_3_structs.v create mode 100755 test_regress/t/t_trace_huge_array.py create mode 100644 test_regress/t/t_trace_huge_array.v create mode 100755 test_regress/t/t_trace_type_alias.py create mode 100644 test_regress/t/t_trace_type_alias.v create mode 100644 test_regress/t/t_trace_type_dupes.out create mode 100755 test_regress/t/t_trace_type_dupes.py create mode 100644 test_regress/t/t_trace_type_dupes.v create mode 100644 test_regress/t/t_trace_type_dupes_structs.out create mode 100755 test_regress/t/t_trace_type_dupes_structs.py diff --git a/src/V3AstAttr.h b/src/V3AstAttr.h index bfe9ba1fb..4c71b9e85 100644 --- a/src/V3AstAttr.h +++ b/src/V3AstAttr.h @@ -1082,6 +1082,16 @@ public: bool isWritable() const VL_MT_SAFE { return m_e == OUTPUT || m_e == INOUT || m_e == REF; } bool isRef() const VL_MT_SAFE { return m_e == REF; } bool isConstRef() const VL_MT_SAFE { return m_e == CONSTREF; } + string traceSigDirection() const { + if (isInout()) { + return "VerilatedTraceSigDirection::INOUT"; + } else if (isWritable()) { + return "VerilatedTraceSigDirection::OUTPUT"; + } else if (isNonOutput()) { + return "VerilatedTraceSigDirection::INPUT"; + } + return "VerilatedTraceSigDirection::NONE"; + } }; constexpr bool operator==(const VDirection& lhs, const VDirection& rhs) VL_MT_SAFE { return lhs.m_e == rhs.m_e; @@ -1745,6 +1755,10 @@ public: static const char* const names[] = {"CONSTANT", "FULL", "CHANGE"}; return names[m_e]; } + const char* func_prefix() const { + static const char* const names[] = {"trace_const", "trace_full", "trace_chg"}; + return names[m_e]; + } }; constexpr bool operator==(const VTraceType& lhs, const VTraceType& rhs) { return lhs.m_e == rhs.m_e; diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h index 1222c32cd..7e9ffa9da 100644 --- a/src/V3AstNodeExpr.h +++ b/src/V3AstNodeExpr.h @@ -4445,6 +4445,7 @@ public: string selfPointerProtect(bool useSelfForThis) const { return selfPointer().protect(useSelfForThis, protect()); } + bool maybePointedTo() const override VL_MT_SAFE { return true; } }; class AstCMethodCall final : public AstNodeCCall { // C++ method call diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h index f2c25e094..985589e13 100644 --- a/src/V3AstNodeOther.h +++ b/src/V3AstNodeOther.h @@ -2059,6 +2059,10 @@ public: } VDirection direction() const VL_MT_SAFE { return m_direction; } bool isIO() const VL_MT_SAFE { return m_direction != VDirection::NONE; } + bool isVLIO() const { + const AstBasicDType* const bdtypep = basicp(); + return isPrimaryIO() && bdtypep && !bdtypep->isOpaque(); + } void declDirection(const VDirection& flag) { m_declDirection = flag; } VDirection declDirection() const { return m_declDirection; } void varType(VVarType type) { m_varType = type; } @@ -2077,7 +2081,7 @@ public: string dpiTmpVarType(const string& varName) const; // Return Verilator internal type for argument: CData, SData, IData, WData string vlArgType(bool named, bool forReturn, bool forFunc, const string& namespc = "", - bool asRef = false) const; + bool asRef = false, bool constRef = false) const; string vlEnumType() const; // Return VerilatorVarType: VLVT_UINT32, etc string vlEnumDir() const; // Return VerilatorVarDir: VLVD_INOUT, etc string vlPropDecl(const string& propName) const; // Return VerilatorVarProps declaration diff --git a/src/V3AstNodeStmt.h b/src/V3AstNodeStmt.h index 3b9b7da94..708d9918b 100644 --- a/src/V3AstNodeStmt.h +++ b/src/V3AstNodeStmt.h @@ -1249,6 +1249,9 @@ class AstTraceDecl final : public AstNodeStmt { // Parents: {statement list} // Expression being traced - Moved to AstTraceInc by V3Trace // @astgen op1 := valuep : Optional[AstNodeExpr] + // + // @astgen ptr := m_dtypeCallp: Optional[AstCCall] // Type init function call + // @astgen ptr := m_dtypeDeclp: Optional[AstTraceDecl] // CCall TraceDecl which replaces this uint32_t m_code{std::numeric_limits::max()}; // Trace identifier code uint32_t m_fidx{0}; // Trace function index const string m_showname; // Name of variable @@ -1256,18 +1259,23 @@ class AstTraceDecl final : public AstNodeStmt { const VNumRange m_arrayRange; // Property of var the trace details const VVarType m_varType; // Type of variable (for localparam vs. param) const VDirection m_declDirection; // Declared direction input/output etc + const bool m_inDtypeFunc; // Trace decl inside type init function + int m_codeInc{0}; // Code increment for type public: AstTraceDecl(FileLine* fl, const string& showname, AstVar* varp, // For input/output state etc - AstNodeExpr* valuep, const VNumRange& bitRange, const VNumRange& arrayRange) + AstNodeExpr* valuep, const VNumRange& bitRange, const VNumRange& arrayRange, + AstCCall* const dtypeCallp, const bool inDtypeFunc) : ASTGEN_SUPER_TraceDecl(fl) , m_showname{showname} , m_bitRange{bitRange} , m_arrayRange{arrayRange} , m_varType{varp->varType()} - , m_declDirection{varp->declDirection()} { + , m_declDirection{varp->declDirection()} + , m_inDtypeFunc{inDtypeFunc} { dtypeFrom(valuep); this->valuep(valuep); + this->dtypeCallp(dtypeCallp); } void dump(std::ostream& str) const override; void dumpJson(std::ostream& str) const override; @@ -1276,7 +1284,7 @@ public: string name() const override VL_MT_STABLE { return m_showname; } bool maybePointedTo() const override VL_MT_SAFE { return true; } bool hasDType() const override VL_MT_SAFE { return true; } - bool sameNode(const AstNode* samep) const override { return false; } + bool sameNode(const AstNode* samep) const override { return true; } string showname() const { return m_showname; } // * = Var name // Details on what we're tracing uint32_t code() const { return m_code; } @@ -1284,7 +1292,9 @@ public: bool codeAssigned() const { return m_code != std::numeric_limits::max(); } uint32_t fidx() const { return m_fidx; } void fidx(uint32_t fidx) { m_fidx = fidx; } + void codeInc(uint32_t codeInc) { m_codeInc = codeInc; } uint32_t codeInc() const { + if (m_codeInc) { return m_codeInc; } return (m_arrayRange.ranged() ? m_arrayRange.elements() : 1) * valuep()->dtypep()->widthWords() * (VL_EDATASIZE / 32); // A code is always 32-bits @@ -1293,6 +1303,11 @@ public: const VNumRange& arrayRange() const { return m_arrayRange; } VVarType varType() const { return m_varType; } VDirection declDirection() const { return m_declDirection; } + AstCCall* dtypeCallp() const { return m_dtypeCallp; } + void dtypeCallp(AstCCall* const callp) { m_dtypeCallp = callp; } + AstTraceDecl* dtypeDeclp() const { return m_dtypeDeclp; } + void dtypeDeclp(AstTraceDecl* const declp) { m_dtypeDeclp = declp; } + bool inDtypeFunc() const { return m_inDtypeFunc; } }; class AstTraceInc final : public AstNodeStmt { // Trace point dump @@ -1339,15 +1354,19 @@ public: class AstTracePushPrefix final : public AstNodeStmt { const string m_prefix; // Prefix to add to signal names const VTracePrefixType m_prefixType; // Type of prefix being pushed + const bool m_quotedPrefix; // Quote prefix name public: - AstTracePushPrefix(FileLine* fl, const string& prefix, VTracePrefixType prefixType) + AstTracePushPrefix(FileLine* fl, const string& prefix, VTracePrefixType prefixType, + bool quotedPrefix = true) : ASTGEN_SUPER_TracePushPrefix(fl) , m_prefix{prefix} - , m_prefixType{prefixType} {} + , m_prefixType{prefixType} + , m_quotedPrefix{quotedPrefix} {} ASTGEN_MEMBERS_AstTracePushPrefix; bool sameNode(const AstNode* samep) const override { return false; } string prefix() const { return m_prefix; } VTracePrefixType prefixType() const { return m_prefixType; } + bool quotedPrefix() const { return m_quotedPrefix; } }; class AstWait final : public AstNodeStmt { // @astgen op1 := condp : AstNodeExpr diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index 7d6970bfa..d5b9fb8e9 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -614,7 +614,7 @@ string AstVar::verilogKwd() const { } string AstVar::vlArgType(bool named, bool forReturn, bool forFunc, const string& namespc, - bool asRef) const { + bool asRef, bool constRef) const { UASSERT_OBJ(!forReturn, this, "Internal data is never passed as return, but as first argument"); string ostatic; @@ -622,7 +622,7 @@ string AstVar::vlArgType(bool named, bool forReturn, bool forFunc, const string& asRef = asRef || isDpiOpenArray() || (forFunc && (isWritable() || isRef() || isConstRef())); - if (forFunc && isReadOnly() && asRef) ostatic = ostatic + "const "; + if (forFunc && (isReadOnly() || constRef) && asRef) ostatic = ostatic + "const "; string oname; if (named) { @@ -3236,7 +3236,8 @@ void AstStop::dumpJson(std::ostream& str) const { } void AstTraceDecl::dump(std::ostream& str) const { this->AstNodeStmt::dump(str); - if (code()) str << " [code=" << code() << "]"; + if (codeAssigned()) str << " [code=" << code() << "]"; + if (dtypeCallp()) str << " [dtypeCallp=" << dtypeCallp() << "]"; } void AstTraceDecl::dumpJson(std::ostream& str) const { dumpJsonNumFunc(str, code); diff --git a/src/V3EmitCBase.cpp b/src/V3EmitCBase.cpp index 667983199..1ce17d997 100644 --- a/src/V3EmitCBase.cpp +++ b/src/V3EmitCBase.cpp @@ -199,7 +199,7 @@ void EmitCBaseVisitorConst::emitVarDecl(const AstVar* nodep, bool asRef) { if (asRef && refNeedParens) puts(")"); emitDeclArrayBrackets(nodep); puts(";\n"); - } else if (nodep->isPrimaryIO() && basicp && !basicp->isOpaque()) { + } else if (nodep->isVLIO()) { if (nodep->isInout()) { putns(nodep, "VL_INOUT"); } else if (nodep->isWritable()) { diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp index d58fb3393..6b0b9c985 100644 --- a/src/V3EmitCImp.cpp +++ b/src/V3EmitCImp.cpp @@ -626,6 +626,16 @@ class EmitCTrace final : public EmitCFunc { } void emitTraceInitOne(const AstTraceDecl* nodep, int enumNum) { + std::string direction; + direction = nodep->declDirection().traceSigDirection(); + + AstCCall* const callp = nodep->dtypeCallp(); + if (callp) { + callp->argTypes(callp->argTypes() + ", " + cvtToStr(nodep->fidx()) + ", c+" + + cvtToStr(nodep->code()) + ", " + direction); + return; + } + if (nodep->dtypep()->basicp()->isDouble()) { puts("VL_TRACE_DECL_DOUBLE"); } else if (nodep->isWide()) { @@ -652,7 +662,11 @@ class EmitCTrace final : public EmitCFunc { // Function index puts(","); - puts(cvtToStr(nodep->fidx())); + if (nodep->inDtypeFunc()) { + puts("fidx"); + } else { + puts(cvtToStr(nodep->fidx())); + } // Name puts(","); @@ -662,14 +676,10 @@ class EmitCTrace final : public EmitCFunc { puts("," + cvtToStr(enumNum)); // Direction - if (nodep->declDirection().isInout()) { - puts(", VerilatedTraceSigDirection::INOUT"); - } else if (nodep->declDirection().isWritable()) { - puts(", VerilatedTraceSigDirection::OUTPUT"); - } else if (nodep->declDirection().isNonOutput()) { - puts(", VerilatedTraceSigDirection::INPUT"); + if (nodep->inDtypeFunc()) { + puts(", direction"); } else { - puts(", VerilatedTraceSigDirection::NONE"); + puts(", " + direction); } // Kind @@ -758,16 +768,7 @@ class EmitCTrace final : public EmitCFunc { puts("VL_SC_BV_DATAP("); } iterateConst(varrefp); // Put var name out - // Tracing only supports 1D arrays - if (nodep->declp()->arrayRange().ranged()) { - if (arrayindex == -2) { - puts("[i]"); - } else if (arrayindex == -1) { - puts("[0]"); - } else { - puts("[" + cvtToStr(arrayindex) + "]"); - } - } + emitTraceIndex(nodep, arrayindex); if (varp->isSc()) puts(".read()"); if (emitTraceIsScUint(nodep)) { puts(nodep->isQuad() ? ".to_uint64()" : ".to_uint()"); @@ -780,10 +781,24 @@ class EmitCTrace final : public EmitCFunc { } else { puts("("); iterateConst(nodep->valuep()); + emitTraceIndex(nodep, arrayindex); puts(")"); } } + void emitTraceIndex(const AstTraceInc* const nodep, int arrayindex) { + // Tracing only supports 1D arrays + if (nodep->declp()->arrayRange().ranged()) { + if (arrayindex == -2) { + puts("[i]"); + } else if (arrayindex == -1) { + puts("[0]"); + } else { + puts("[" + cvtToStr(arrayindex) + "]"); + } + } + } + // VISITORS using EmitCFunc::visit; // Suppress hidden overloaded virtual function warning void visit(AstCFunc* nodep) override { @@ -803,7 +818,11 @@ class EmitCTrace final : public EmitCFunc { } void visit(AstTracePushPrefix* nodep) override { putns(nodep, "tracep->pushPrefix("); - putsQuoted(VIdProtect::protectWordsIf(nodep->prefix(), nodep->protect())); + if (nodep->quotedPrefix()) { + putsQuoted(VIdProtect::protectWordsIf(nodep->prefix(), nodep->protect())); + } else { + puts(nodep->prefix()); + } puts(", VerilatedTracePrefixType::"); puts(nodep->prefixType().ascii()); puts(");\n"); diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp index 182a451c7..9e3f06b04 100644 --- a/src/V3Gate.cpp +++ b/src/V3Gate.cpp @@ -429,11 +429,11 @@ class GateOkVisitor final : public VNVisitorConst { // We only allow a LHS ref for the var being set, and a RHS ref for // something else being read. + AstVarScope* const vscp = nodep->varScopep(); if (nodep->access().isWriteOnly()) { if (m_lhsVarRef) clearSimple(">1 write refs"); m_lhsVarRef = nodep; } else { - AstVarScope* const vscp = nodep->varScopep(); // TODO: possible bug, should it be >= 1 as add is below? if (m_readVscps.size() > 1) { if (m_buffersOnly) clearSimple(">1 rhs varRefs"); diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp index 4b532e76f..8b0644dc8 100644 --- a/src/V3Trace.cpp +++ b/src/V3Trace.cpp @@ -39,13 +39,16 @@ #include "V3Trace.h" +#include "V3Ast.h" #include "V3DupFinder.h" #include "V3EmitCBase.h" #include "V3Graph.h" #include "V3Stats.h" +#include "V3UniqueNames.h" #include #include +#include VL_DEFINE_DEBUG_FUNCTIONS; @@ -162,8 +165,10 @@ class TraceVisitor final : public VNVisitor { // Cleared entire netlist // AstCFunc::user1() // V3GraphVertex* for this node // AstTraceDecl::user1() // V3GraphVertex* for this node + // AstTraceDecl::user2() // dtype decl cannot be used for _chg // AstVarScope::user1() // V3GraphVertex* for this node // AstStmtExpr::user2() // bool; walked next list for other ccalls + // AstVarRef::user2() // dtype V3TraceDecl* for this node // Ast*::user3() // TraceActivityVertex* for this node const VNUser1InUse m_inuser1; const VNUser2InUse m_inuser2; @@ -183,6 +188,15 @@ class TraceVisitor final : public VNVisitor { V3Graph m_graph; // Var/CFunc tracking TraceActivityVertex* const m_alwaysVtxp; // "Always trace" vertex bool m_finding = false; // Pass one of algorithm? + struct DtypeFuncs final { + public: + AstCFunc* fullFuncp = nullptr; + AstCFunc* chgFuncp = nullptr; + }; + std::unordered_map + m_dtypeNonConstFuncs; // Full / Chg funcs per type + std::unordered_map m_dtypeConstFuncs; // Const func per type + V3UniqueNames m_dtypeNames{""}; // Unique type func names // Trace parallelism. Only VCD tracing can be parallelized at this time. const uint32_t m_parallelism @@ -206,13 +220,13 @@ class TraceVisitor final : public VNVisitor { // Hash all of the traced values and find if there are any duplicates for (V3GraphVertex& vtx : m_graph.vertices()) { if (TraceTraceVertex* const vvertexp = vtx.cast()) { - const AstTraceDecl* const nodep = vvertexp->nodep(); + AstTraceDecl* const nodep = vvertexp->nodep(); UASSERT_OBJ(!vvertexp->duplicatep(), nodep, "Should not be a duplicate"); - const auto dupit = dupFinder.findDuplicate(nodep->valuep()); + const auto dupit = dupFinder.findDuplicate(nodep); if (dupit == dupFinder.end()) { - dupFinder.insert(nodep->valuep()); + dupFinder.insert(nodep); } else { - const AstTraceDecl* const dupDeclp = VN_AS(dupit->second->backp(), TraceDecl); + const AstTraceDecl* const dupDeclp = VN_AS(dupit->second, TraceDecl); UASSERT_OBJ(dupDeclp, nodep, "Trace duplicate of wrong type"); TraceTraceVertex* const dupvertexp = dupDeclp->user1u().toGraphVertex()->cast(); @@ -228,6 +242,46 @@ class TraceVisitor final : public VNVisitor { dupFinder.dumpFile(v3Global.debugFilename("trace") + ".hash", false); } + void graphDtypePrune() { + for (V3GraphVertex* const vtxp : m_graph.vertices().unlinkable()) { + if (TraceTraceVertex* const vvertexp = vtxp->cast()) { + AstTraceDecl* const declp = vvertexp->nodep(); + // This skips the dtype sub-func optimization if a var is affected by multiple + // activities. We really only need to do this for _chg funcs (and not decls, + // _const and _full) but it's simpiler to do it all one way or the other. + if (declp) { + if (declp->user2() || (declp->dtypeDeclp() && !declp->dtypeDeclp()->user2())) { + AstCCall* const callp = declp->dtypeCallp(); + if (callp) { + AstNode* stmtexprp = callp->backp(); + VL_DO_DANGLING(pushDeletep(stmtexprp->unlinkFrBack()), stmtexprp); + } else { + bool emptyScope; + do { + emptyScope = false; + AstNode* const declBackp = declp->backp(); + AstNode* const declNextp = declp->nextp(); + if (VN_IS(declBackp, TracePushPrefix) + && VN_IS(declNextp, TracePopPrefix)) { + VL_DO_DANGLING(pushDeletep(declBackp->unlinkFrBack()), + declBackp); + VL_DO_DANGLING(pushDeletep(declNextp->unlinkFrBack()), + declNextp); + emptyScope = true; + } + } while (emptyScope); + } + // Can't purge until we finish this pass + pushDeletep(declp->unlinkFrBack()); + vvertexp->rerouteEdges(&m_graph); + vvertexp->unlinkDelete(&m_graph); + } + declp->dtypeDeclp(nullptr); + } + } + } + } + void graphSimplify(bool initial) { if (initial) { // Remove all variable nodes @@ -483,24 +537,26 @@ class TraceVisitor final : public VNVisitor { } AstCFunc* newCFunc(VTraceType traceType, AstCFunc* topFuncp, uint32_t funcNum, - uint32_t baseCode = 0) { + uint32_t baseCode = 0, const AstTraceDecl* const declp = nullptr, + bool declSub = false) { // Create new function - const bool isTopFunc = topFuncp == nullptr; + const bool isTopFunc = !declp && topFuncp == nullptr; std::string funcName; - if (isTopFunc) { - if (traceType == VTraceType::CONSTANT) { - funcName = "trace_const"; - } else if (traceType == VTraceType::FULL) { - funcName = "trace_full"; - } else { - funcName = "trace_chg"; - } + if (isTopFunc || declp) { + funcName = traceType.func_prefix(); } else { funcName = topFuncp->name(); funcName += "_sub"; } - funcName += "_"; - funcName += cvtToStr(funcNum); + if (declp) { + funcName += "_dtype"; + if (declSub) funcName += "_sub"; + funcName += "__"; + funcName = m_dtypeNames.get(funcName); + } else { + funcName += "_"; + funcName += cvtToStr(funcNum); + } FileLine* const flp = m_topScopep->fileline(); AstCFunc* const funcp = new AstCFunc{flp, funcName, m_topScopep}; @@ -513,7 +569,10 @@ class TraceVisitor final : public VNVisitor { m_topScopep->addBlocksp(funcp); const std::string bufArg = v3Global.opt.traceClassBase() - + "::" + (v3Global.opt.useTraceOffload() ? "OffloadBuffer" : "Buffer") + "* bufp"; + + "::" + (v3Global.opt.useTraceOffload() ? "OffloadBuffer" : "Buffer") + "* bufp" + + (declp ? (", uint32_t offset, const " + declp->dtypep()->cType("", true, true) + + " __VdtypeVar") + : ""); if (isTopFunc) { // Top functions funcp->argTypes("void* voidSelf, " + bufArg); @@ -548,35 +607,82 @@ class TraceVisitor final : public VNVisitor { if (traceType != VTraceType::CHANGE) { // Full dump sub function funcp->addStmtsp(new AstCStmt{flp, // - "uint32_t* const oldp VL_ATTR_UNUSED = " - "bufp->oldp(vlSymsp->__Vm_baseCode);\n"}); + string("uint32_t* const oldp VL_ATTR_UNUSED = " + "bufp->oldp(vlSymsp->__Vm_baseCode") + + (declp ? " + offset" : "") + ");\n"}); } else { // Change dump sub function if (v3Global.opt.useTraceOffload()) { funcp->addStmtsp(new AstCStmt{flp, // "const uint32_t base VL_ATTR_UNUSED = " "vlSymsp->__Vm_baseCode + " - + cvtToStr(baseCode) + ";\n"}); + + (declp ? " offset" : cvtToStr(baseCode)) + + ";\n"}); funcp->addStmtsp( new AstCStmt{flp, "(void)bufp; // Prevent unused variable warning\n"}); } else { funcp->addStmtsp(new AstCStmt{flp, // "uint32_t* const oldp VL_ATTR_UNUSED = " "bufp->oldp(vlSymsp->__Vm_baseCode + " - + cvtToStr(baseCode) + ");\n"}); + + (declp ? " offset" : cvtToStr(baseCode)) + + ");\n"}); } } - // Add call to top function - AstCCall* const callp = new AstCCall{funcp->fileline(), funcp}; - callp->dtypeSetVoid(); - callp->argTypes("bufp"); - topFuncp->addStmtsp(callp->makeStmt()); + if (!declp) { + // Add call to top function + AstCCall* const callp = new AstCCall{funcp->fileline(), funcp}; + callp->dtypeSetVoid(); + callp->argTypes("bufp"); + topFuncp->addStmtsp(callp->makeStmt()); + } } // Done UINFO(5, " newCFunc " << funcp); return funcp; } + AstCFunc* newCDtypeSubFunc(VTraceType traceType, const AstTraceDecl* const declp, + AstCFunc* parentp) { + AstCFunc* const funcp = newCFunc(traceType, nullptr, 0, 0, declp, true); + FileLine* const flp = m_topScopep->fileline(); + AstCCall* const callp = new AstCCall{flp, funcp}; + callp->dtypeSetVoid(); + callp->argTypes("bufp, offset, __VdtypeVar"); + parentp->addStmtsp(callp->makeStmt()); + return funcp; + } + + AstCFunc* createConstDtypeTraceFunctions(const AstTraceDecl* declp) { + const AstNodeDType* const dtypep = declp->dtypep()->skipRefp(); + auto pair = m_dtypeConstFuncs.emplace(dtypep, nullptr); + if (pair.second) { + FileLine* const flp = declp->fileline(); + AstCFunc* const funcp = newCFunc(VTraceType::CONSTANT, nullptr, 0, 0, declp); + + bool first = true; + for (AstNode* callStmtp = declp->dtypeCallp()->funcp()->stmtsp(); callStmtp; + callStmtp = callStmtp->nextp()) { + const AstCCall* const callp + = VN_CAST(VN_CAST(callStmtp, StmtExpr)->exprp(), CCall); + bool onlyOne = first && !callStmtp->nextp(); + AstCFunc* const subFuncp + = onlyOne ? funcp : newCDtypeSubFunc(VTraceType::CONSTANT, declp, funcp); + for (AstNode* stmtp = callp->funcp()->stmtsp(); stmtp; stmtp = stmtp->nextp()) { + if (AstTraceDecl* const fieldDeclp = VN_CAST(stmtp, TraceDecl)) { + AstTraceInc* const incp + = new AstTraceInc{flp, fieldDeclp, VTraceType::CONSTANT}; + subFuncp->addStmtsp(incp); + } + } + first = false; + } + + pair.first->second = funcp; + } + + return pair.first->second; + } + void createConstTraceFunctions(const TraceVec& traces) { const int splitLimit = v3Global.opt.outputSplitCTrace() ? v3Global.opt.outputSplitCTrace() : std::numeric_limits::max(); @@ -618,13 +724,62 @@ class TraceVisitor final : public VNVisitor { ++subFuncNum; } FileLine* const flp = declp->fileline(); - AstTraceInc* const incp = new AstTraceInc{flp, declp, VTraceType::CONSTANT}; - subFuncp->addStmtsp(incp); - subStmts += incp->nodeCount(); + if (declp->dtypeCallp()) { + AstCFunc* const funcp = createConstDtypeTraceFunctions(declp); + AstNodeExpr* argsp = nullptr; + argsp = AstNode::addNext(argsp, declp->valuep()->cloneTree(false)); + AstCCall* const callp = new AstCCall{flp, funcp, argsp}; + callp->dtypeSetVoid(); + callp->argTypes(callp->argTypes() + "bufp, " + std::to_string(declp->code())); + subFuncp->addStmtsp(callp->makeStmt()); + + subStmts += 1; + } else { + AstTraceInc* const incp = new AstTraceInc{flp, declp, VTraceType::CONSTANT}; + subFuncp->addStmtsp(incp); + subStmts += incp->nodeCount(); + } } } } + DtypeFuncs createNonConstDtypeTraceFunctions(const AstTraceDecl* declp) { + AstNodeDType* dtypep = declp->dtypep()->skipRefp(); + auto pair = m_dtypeNonConstFuncs.emplace(dtypep, DtypeFuncs{}); + if (pair.second) { + FileLine* const flp = declp->fileline(); + AstCFunc* const fullFuncp = newCFunc(VTraceType::FULL, nullptr, 0, 0, declp); + AstCFunc* const chgFuncp = newCFunc(VTraceType::CHANGE, nullptr, 0, 0, declp); + + bool first = true; + for (AstNode* callStmtp = declp->dtypeCallp()->funcp()->stmtsp(); callStmtp; + callStmtp = callStmtp->nextp()) { + const AstCCall* const callp + = VN_CAST(VN_CAST(callStmtp, StmtExpr)->exprp(), CCall); + bool onlyOne = first && !callStmtp->nextp(); + AstCFunc* const fullSubFuncp + = onlyOne ? fullFuncp : newCDtypeSubFunc(VTraceType::FULL, declp, fullFuncp); + AstCFunc* const chgSubFuncp + = onlyOne ? chgFuncp : newCDtypeSubFunc(VTraceType::CHANGE, declp, chgFuncp); + for (AstNode* stmtp = callp->funcp()->stmtsp(); stmtp; stmtp = stmtp->nextp()) { + if (AstTraceDecl* const fieldDeclp = VN_CAST(stmtp, TraceDecl)) { + AstTraceInc* const incFullp + = new AstTraceInc{flp, fieldDeclp, VTraceType::FULL}; + fullSubFuncp->addStmtsp(incFullp); + AstTraceInc* const incChgp + = new AstTraceInc{flp, fieldDeclp, VTraceType::CHANGE}; + chgSubFuncp->addStmtsp(incChgp); + } + } + first = false; + } + + pair.first->second = {.fullFuncp = fullFuncp, .chgFuncp = chgFuncp}; + } + + return pair.first->second; + } + void createNonConstTraceFunctions(const TraceVec& traces, uint32_t nAllCodes, uint32_t parallelism) { const int splitLimit = v3Global.opt.outputSplitCTrace() ? v3Global.opt.outputSplitCTrace() @@ -700,24 +855,44 @@ class TraceVisitor final : public VNVisitor { // Add TraceInc nodes FileLine* const flp = declp->fileline(); - AstTraceInc* const incFulp = new AstTraceInc{flp, declp, VTraceType::FULL}; - subFulFuncp->addStmtsp(incFulp); - AstTraceInc* const incChgp - = new AstTraceInc{flp, declp, VTraceType::CHANGE, baseCode}; - ifp->addThensp(incChgp); + if (declp->dtypeCallp()) { + DtypeFuncs funcs = createNonConstDtypeTraceFunctions(declp); + AstNodeExpr* argsp = nullptr; + argsp = AstNode::addNext(argsp, declp->valuep()->cloneTree(false)); + AstCCall* const callFullp = new AstCCall{flp, funcs.fullFuncp, argsp}; + callFullp->dtypeSetVoid(); + callFullp->argTypes(callFullp->argTypes() + "bufp, " + + std::to_string(declp->code())); + subFulFuncp->addStmtsp(callFullp->makeStmt()); + argsp = nullptr; + argsp = AstNode::addNext(argsp, declp->valuep()->cloneTree(false)); + AstCCall* const callChgp = new AstCCall{flp, funcs.chgFuncp, argsp}; + callChgp->dtypeSetVoid(); + callChgp->argTypes(callChgp->argTypes() + "bufp, " + + std::to_string(declp->code())); + ifp->addThensp(callChgp->makeStmt()); - // Set the function index of the decl - declp->fidx(topFuncNum); - - // Track splitting due to size - UASSERT_OBJ(incFulp->nodeCount() == incChgp->nodeCount(), declp, - "Should have equal cost"); - const VNumRange range = declp->arrayRange(); - if (range.ranged()) { - // 2x because each element is a TraceInc and a VarRef - subStmts += range.elements() * 2; + subStmts += 2; } else { - subStmts += incChgp->nodeCount(); + AstTraceInc* const incFulp = new AstTraceInc{flp, declp, VTraceType::FULL}; + subFulFuncp->addStmtsp(incFulp); + AstTraceInc* const incChgp + = new AstTraceInc{flp, declp, VTraceType::CHANGE, baseCode}; + ifp->addThensp(incChgp); + + // Set the function index of the decl + declp->fidx(topFuncNum); + + // Track splitting due to size + UASSERT_OBJ(incFulp->nodeCount() == incChgp->nodeCount(), declp, + "Should have equal cost"); + const VNumRange range = declp->arrayRange(); + if (range.ranged()) { + // 2x because each element is a TraceInc and a VarRef + subStmts += range.elements() * 2; + } else { + subStmts += incChgp->nodeCount(); + } } // Track partitioning @@ -761,6 +936,8 @@ class TraceVisitor final : public VNVisitor { } void createTraceFunctions() { + graphDtypePrune(); + // Detect and remove duplicate values detectDuplicates(); m_graph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue); @@ -887,7 +1064,7 @@ class TraceVisitor final : public VNVisitor { || nodep->isCoroutine()) { // Cannot treat a coroutine as slow, it may be resumed later const bool slow = nodep->slow() && !nodep->isCoroutine(); - V3GraphVertex* const activityVtxp = getActivityVertexp(nodep, slow); + TraceActivityVertex* const activityVtxp = getActivityVertexp(nodep, slow); new V3GraphEdge{&m_graph, activityVtxp, funcVtxp, 1}; } } @@ -897,7 +1074,7 @@ class TraceVisitor final : public VNVisitor { } void visit(AstTraceDecl* nodep) override { UINFO(8, " TRACE " << nodep); - if (!m_finding) { + if (!m_finding && !nodep->inDtypeFunc()) { V3GraphVertex* const vertexp = new TraceTraceVertex{&m_graph, nodep}; nodep->user1p(vertexp); @@ -908,10 +1085,11 @@ class TraceVisitor final : public VNVisitor { } } void visit(AstVarRef* nodep) override { + UASSERT_OBJ(nodep->varScopep(), nodep, "No var scope?"); + AstVarScope* const varscopep = nodep->varScopep(); + V3GraphVertex* varVtxp = varscopep->user1u().toGraphVertex(); if (m_tracep) { - UASSERT_OBJ(nodep->varScopep(), nodep, "No var scope?"); UASSERT_OBJ(nodep->access().isReadOnly(), nodep, "Lvalue in trace? Should be const."); - V3GraphVertex* varVtxp = nodep->varScopep()->user1u().toGraphVertex(); if (!varVtxp) { varVtxp = new TraceVarVertex{&m_graph, nodep->varScopep()}; nodep->varScopep()->user1p(varVtxp); @@ -922,12 +1100,23 @@ class TraceVisitor final : public VNVisitor { || nodep->varp()->isSigPublic()) { // Or ones user can change new V3GraphEdge{&m_graph, m_alwaysVtxp, traceVtxp, 1}; } + if (m_tracep->dtypeCallp()) varscopep->user2p(m_tracep); } else if (m_cfuncp && m_finding && nodep->access().isWriteOrRW()) { - UASSERT_OBJ(nodep->varScopep(), nodep, "No var scope?"); V3GraphVertex* const funcVtxp = getCFuncVertexp(m_cfuncp); - V3GraphVertex* const varVtxp = nodep->varScopep()->user1u().toGraphVertex(); if (varVtxp) { // else we're not tracing this signal new V3GraphEdge{&m_graph, funcVtxp, varVtxp, 1}; + AstTraceDecl* const declp = VN_AS(varscopep->user2p(), TraceDecl); + if (declp) { + V3GraphVertex* const cFuncVtxp = getCFuncVertexp(m_cfuncp); + for (const V3GraphEdge& edge : cFuncVtxp->inEdges()) { + V3GraphVertex* const activityp = edge.fromp(); + if (!declp->user3p()) { + declp->user3p(activityp); + } else if (declp->user3u().toGraphVertex() != activityp) { + declp->user2(true); + } + } + } } } } @@ -938,7 +1127,15 @@ public: // CONSTRUCTORS explicit TraceVisitor(AstNetlist* nodep) : m_alwaysVtxp{new TraceActivityVertex{&m_graph, TraceActivityVertex::ACTIVITY_ALWAYS}} { + nodep->user2ClearTree(); // TraceDecl multiple activities flag + nodep->user3ClearTree(); // TraceDecl TraceActivityVertex (assumes we start at nullptr) iterate(nodep); + nodep->foreach([](AstTraceDecl* const declp) { + if (declp->inDtypeFunc()) { + declp->valuep()->unlinkFrBack()->deleteTree(); + declp->valuep(nullptr); + } + }); } ~TraceVisitor() override { V3Stats::addStat("Tracing, Activity setters", m_statSetters); diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp index 940066dca..73c1ad909 100644 --- a/src/V3TraceDecl.cpp +++ b/src/V3TraceDecl.cpp @@ -24,13 +24,21 @@ #include "V3TraceDecl.h" +#include "V3Ast.h" #include "V3Control.h" #include "V3EmitCBase.h" +#include "V3Error.h" +#include "V3File.h" +#include "V3Global.h" +#include "V3Number.h" #include "V3Stats.h" +#include "V3UniqueNames.h" +#include #include #include #include +#include #include VL_DEFINE_DEBUG_FUNCTIONS; @@ -94,6 +102,10 @@ public: // TraceDecl state, as a visitor of each AstNode class TraceDeclVisitor final : public VNVisitor { + // NODE STATE + // AstCFunc::user1() // code offset for current type + // AstCFunc::user2() // VarScope for dtype functions + // STATE AstTopScope* const m_topScopep; // The singleton AstTopScope const AstScope* m_currScopep = nullptr; // Current scope being visited @@ -101,6 +113,15 @@ class TraceDeclVisitor final : public VNVisitor { std::vector m_topFuncps; // Top level trace initialization functions std::vector m_subFuncps; // Trace sub functions for this scope std::set m_declUncalledps; // Declarations not called + std::unordered_map m_dtypeFuncs; // Functions per type + AstCFunc* m_dtypeFuncp = nullptr; // Current type func + AstCFunc* m_dtypeSubFuncp = nullptr; // Current type sub func + const string m_dtypeArgs{", const char* name, uint32_t fidx, uint32_t c, " + "VerilatedTraceSigDirection direction"}; // Type func args + AstTraceDecl* m_dtypeDeclp = nullptr; // Current type func decl + V3UniqueNames m_dtypeNames{""}; // Unique names for dtype funcs + bool m_skipDtypeFunc = false; // Don't create a type func + uint32_t m_offset = std::numeric_limits::max(); // Offset for types int m_topFuncSize = 0; // Size of the top function currently being built int m_subFuncSize = 0; // Size of the sub function currently being built const int m_funcSizeLimit // Maximum size of a function @@ -255,6 +276,13 @@ class TraceDeclVisitor final : public VNVisitor { } void addToSubFunc(AstNodeStmt* stmtp) { + // TODO (maybe) -- sub funcs for dtype components + if (m_dtypeSubFuncp) { + if (m_subFuncSize > m_funcSizeLimit) newDeclSubFunc(); + m_dtypeSubFuncp->addStmtsp(stmtp); + m_subFuncSize += stmtp->nodeCount(); + return; + } if (m_subFuncSize > m_funcSizeLimit || m_subFuncps.empty()) { m_subFuncSize = 0; // @@ -269,20 +297,38 @@ class TraceDeclVisitor final : public VNVisitor { m_subFuncSize += stmtp->nodeCount(); } - void addTraceDecl(const VNumRange& arrayRange, - int widthOverride) { // If !=0, is packed struct/array where basicp size - // misreflects one element + AstTraceDecl* addTraceDecl(const VNumRange& arrayRange, + int widthOverride, // If !=0, is packed struct/array where basicp + // size misreflects one element + AstCCall* const dtypeCallp = nullptr) { VNumRange bitRange; if (widthOverride) { bitRange = VNumRange{widthOverride - 1, 0}; } else if (const AstBasicDType* const bdtypep = m_traValuep->dtypep()->basicp()) { bitRange = bdtypep->nrange(); } + FileLine* const flp = m_traVscp->fileline(); + AstNodeExpr* valuep = m_traValuep->cloneTree(false); + const bool validOffset = m_offset != std::numeric_limits::max(); AstTraceDecl* const newp - = new AstTraceDecl{m_traVscp->fileline(), m_traName, m_traVscp->varp(), - m_traValuep->cloneTree(false), bitRange, arrayRange}; + = new AstTraceDecl{flp, m_traName, m_traVscp->varp(), valuep, + bitRange, arrayRange, dtypeCallp, validOffset}; + if (validOffset) { + newp->code(m_offset); + if (!dtypeCallp) { m_offset += newp->codeInc(); } + valuep->foreach([&](AstVarRef* const refp) { + UASSERT_OBJ(refp->varScopep() == m_traVscp, refp, + "Trace decl expression references unexpected var"); + refp->replaceWith(new AstCExpr{flp, "__VdtypeVar", m_traVscp->width()}); + VL_DO_DANGLING(refp->deleteTree(), refp); + }); + } else { + newp->dtypeDeclp(m_dtypeDeclp); + } m_declUncalledps.emplace(newp); addToSubFunc(newp); + + return newp; } void addIgnore(const string& why) { @@ -541,10 +587,14 @@ class TraceDeclVisitor final : public VNVisitor { // VISITORS - Data types when tracing void visit(AstConstDType* nodep) override { if (!m_traVscp) return; + VL_RESTORER(m_offset); + VL_RESTORER(m_skipDtypeFunc); + m_skipDtypeFunc = true; iterate(nodep->subDTypep()->skipRefToEnump()); } void visit(AstRefDType* nodep) override { if (!m_traVscp) return; + VL_RESTORER(m_offset); iterate(nodep->subDTypep()->skipRefToEnump()); } void visit(AstIfaceRefDType* nodep) override { @@ -556,20 +606,70 @@ class TraceDeclVisitor final : public VNVisitor { addToSubFunc(stmtp); m_ifaceRefInitPlaceholders.emplace_back(m_traVscp, stmtp); } - void visit(AstUnpackArrayDType* nodep) override { - // Note more specific dtypes above - if (!m_traVscp) return; + void newDeclSubFunc() { + FileLine* const flp = m_dtypeFuncp->fileline(); + AstCFunc* const subFuncp = newCFunc(flp, m_dtypeNames.get("trace_init_dtype_sub__")); + subFuncp->argTypes(subFuncp->argTypes() + m_dtypeArgs); + AstCCall* const subCallp = new AstCCall{flp, subFuncp}; + subCallp->dtypeSetVoid(); + subCallp->argTypes("tracep, name, fidx, c, direction"); + m_dtypeFuncp->addStmtsp(subCallp->makeStmt()); + m_dtypeSubFuncp = subFuncp; + m_subFuncSize = 0; + } + void newDeclFunc(AstNodeDType* nodep) { + AstNodeDType* const skipTypep = nodep->skipRefp(); + // offset and direction args added in EmitCImp + std::string callArgs{"tracep, \"" + VIdProtect::protect(m_traName) + "\""}; + VL_RESTORER(m_traName); + FileLine* const flp = skipTypep->fileline(); - if (v3Global.opt.traceMaxArray() - && static_cast(nodep->arrayUnpackedElements()) > v3Global.opt.traceMaxArray()) { - addIgnore("Wide memory > --trace-max-array ents"); - return; + auto pair = m_dtypeFuncs.emplace(skipTypep, nullptr); + AstCFunc** funcpp = &pair.first->second; + if (pair.second) { + *funcpp = newCFunc(flp, m_dtypeNames.get("trace_init_dtype__")); + (*funcpp)->argTypes((*funcpp)->argTypes() + m_dtypeArgs); + (*funcpp)->user2p(m_traVscp); } + AstCCall* const callp = new AstCCall{flp, *funcpp}; + callp->dtypeSetVoid(); + callp->argTypes(callArgs); + m_dtypeDeclp = addTraceDecl(VNumRange{}, skipTypep->width(), callp); + addToSubFunc(callp->makeStmt()); + + if (pair.second) { + VL_RESTORER(m_offset); + m_offset = 0; + + VL_RESTORER(m_dtypeFuncp); + VL_RESTORER(m_dtypeSubFuncp); + VL_RESTORER(m_subFuncSize); + m_dtypeFuncp = *funcpp; + newDeclSubFunc(); + if (AstStructDType* const dtypep = VN_CAST(skipTypep, StructDType)) { + declStruct(dtypep, true); + } else if (AstUnpackArrayDType* const dtypep = VN_CAST(skipTypep, UnpackArrayDType)) { + declUnpackedArray(dtypep, true); + } else if (AstPackArrayDType* const dtypep = VN_CAST(skipTypep, PackArrayDType)) { + declPackedArray(dtypep, true); + } else { + UASSERT_OBJ(false, skipTypep, "Creating a trace function for an unexpected type"); + } + m_dtypeFuncp->user1(m_offset); + } + + m_dtypeDeclp->codeInc((*funcpp)->user1()); + m_offset += m_dtypeDeclp->codeInc(); + } + void declUnpackedArray(AstUnpackArrayDType* const nodep, bool newFunc) { + string prefixName(newFunc ? "name" : m_traName); + VL_RESTORER(m_traName); FileLine* const flp = nodep->fileline(); - addToSubFunc(new AstTracePushPrefix{flp, m_traName, VTracePrefixType::ARRAY_UNPACKED}); + addToSubFunc( + new AstTracePushPrefix{flp, prefixName, VTracePrefixType::ARRAY_UNPACKED, !newFunc}); if (VN_IS(nodep->subDTypep()->skipRefToEnump(), BasicDType) // Nothing lower than this array @@ -597,20 +697,34 @@ class TraceDeclVisitor final : public VNVisitor { addToSubFunc(new AstTracePopPrefix{flp}); } - void visit(AstPackArrayDType* nodep) override { + bool isBasicIO() { return m_traVscp->varp()->isVLIO(); } + void visit(AstUnpackArrayDType* nodep) override { + // Note more specific dtypes above if (!m_traVscp) return; - if (!v3Global.opt.traceStructs()) { - // Everything downstream is packed, so deal with as one trace unit. - // This may not be the nicest for user presentation, but is - // a much faster way to trace - addTraceDecl(VNumRange{}, nodep->width()); + if (v3Global.opt.traceMaxArray() + && static_cast(nodep->arrayUnpackedElements()) > v3Global.opt.traceMaxArray()) { + addIgnore("Wide memory > --trace-max-array ents"); return; } + VL_RESTORER(m_skipDtypeFunc); + VL_RESTORER(m_dtypeDeclp); + if (isBasicIO()) m_skipDtypeFunc = true; + + if (!(m_skipDtypeFunc || m_dtypeDeclp)) { + VL_RESTORER(m_offset); + newDeclFunc(nodep); + } + declUnpackedArray(nodep, false); + } + void declPackedArray(AstPackArrayDType* const nodep, bool newFunc) { + string prefixName(newFunc ? "name" : m_traName); + VL_RESTORER(m_traName); FileLine* const flp = nodep->fileline(); - addToSubFunc(new AstTracePushPrefix{flp, m_traName, VTracePrefixType::ARRAY_PACKED}); + addToSubFunc( + new AstTracePushPrefix{flp, prefixName, VTracePrefixType::ARRAY_PACKED, !newFunc}); AstNodeDType* const subtypep = nodep->subDTypep()->skipRefToEnump(); for (int i = nodep->lo(); i <= nodep->hi(); ++i) { @@ -626,23 +740,33 @@ class TraceDeclVisitor final : public VNVisitor { addToSubFunc(new AstTracePopPrefix{flp}); } - void visit(AstStructDType* nodep) override { + void visit(AstPackArrayDType* nodep) override { if (!m_traVscp) return; - if (nodep->packed() && !v3Global.opt.traceStructs()) { - // Everything downstream is packed, so deal with as one trace unit + if (!v3Global.opt.traceStructs()) { + // Everything downstream is packed, so deal with as one trace unit. // This may not be the nicest for user presentation, but is // a much faster way to trace addTraceDecl(VNumRange{}, nodep->width()); return; } - VL_RESTORER(m_traName); - FileLine* const flp = nodep->fileline(); + VL_RESTORER(m_skipDtypeFunc); + VL_RESTORER(m_dtypeDeclp); + if (isBasicIO()) m_skipDtypeFunc = true; + if (!(m_skipDtypeFunc || m_dtypeDeclp)) { + VL_RESTORER(m_offset); + newDeclFunc(nodep); + } + declPackedArray(nodep, false); + } + void declStruct(AstStructDType* const nodep, bool newFunc) { + FileLine* const flp = nodep->fileline(); + string prefixName(newFunc ? "name" : m_traName); if (!nodep->packed()) { - addToSubFunc( - new AstTracePushPrefix{flp, m_traName, VTracePrefixType::STRUCT_UNPACKED}); + addToSubFunc(new AstTracePushPrefix{flp, prefixName, VTracePrefixType::STRUCT_UNPACKED, + !newFunc}); for (const AstMemberDType *itemp = nodep->membersp(), *nextp; itemp; itemp = nextp) { nextp = VN_AS(itemp->nextp(), MemberDType); AstNodeDType* const subtypep = itemp->subDTypep()->skipRefToEnump(); @@ -656,7 +780,8 @@ class TraceDeclVisitor final : public VNVisitor { } addToSubFunc(new AstTracePopPrefix{flp}); } else { - addToSubFunc(new AstTracePushPrefix{flp, m_traName, VTracePrefixType::STRUCT_PACKED}); + addToSubFunc(new AstTracePushPrefix{flp, prefixName, VTracePrefixType::STRUCT_PACKED, + !newFunc}); for (const AstMemberDType *itemp = nodep->membersp(), *nextp; itemp; itemp = nextp) { nextp = VN_AS(itemp->nextp(), MemberDType); AstNodeDType* const subtypep = itemp->subDTypep()->skipRefToEnump(); @@ -671,9 +796,37 @@ class TraceDeclVisitor final : public VNVisitor { addToSubFunc(new AstTracePopPrefix{flp}); } } + void visit(AstStructDType* nodep) override { + if (!m_traVscp) return; + + if (nodep->packed() && !v3Global.opt.traceStructs()) { + // Everything downstream is packed, so deal with as one trace unit + // This may not be the nicest for user presentation, but is + // a much faster way to trace + addTraceDecl(VNumRange{}, nodep->width()); + return; + } + + VL_RESTORER(m_skipDtypeFunc); + VL_RESTORER(m_dtypeDeclp); + if (isBasicIO()) m_skipDtypeFunc = true; + + // Only create sub functions for top-level structs, i.e. don't have struct funcs + // call other struct funcs for child types. This could easily be done for decl funcs + // but full / chg funcs would require copying / aligning data for child types or more + // complicated / wonky / generalized data access. + if (!(m_skipDtypeFunc || m_dtypeDeclp)) { + VL_RESTORER(m_offset); + newDeclFunc(nodep); + } + declStruct(nodep, false); + } void visit(AstUnionDType* nodep) override { if (!m_traVscp) return; + VL_RESTORER(m_skipDtypeFunc); + m_skipDtypeFunc = true; + if (nodep->packed() && !v3Global.opt.traceStructs()) { // Everything downstream is packed, so deal with as one trace unit // This may not be the nicest for user presentation, but is diff --git a/test_regress/driver.py b/test_regress/driver.py index 9ccf0ac4d..d62c07457 100755 --- a/test_regress/driver.py +++ b/test_regress/driver.py @@ -2691,7 +2691,7 @@ class VlTest: contents = self.file_contents(filename) if contents == "_Already_Errored_": return - count = len(re.findall(regexp, contents)) + count = len(re.findall(regexp, contents, re.MULTILINE)) if expcount != count: self.error("File_grep_count: " + filename + ": Got='" + str(count) + "' Expected='" + str(expcount) + "' in regexp: '" + regexp + "'") @@ -2701,7 +2701,7 @@ class VlTest: contents = self.file_contents(filename) if contents == "_Already_Errored_": return - match = re.search(regexp, contents) + match = re.search(regexp, contents, re.MULTILINE) if match: if expvalue is not None and str(expvalue) != match.group(1): self.error("file_grep: " + filename + ": Got='" + match.group(1) + diff --git a/test_regress/t/t_cast_signed.v b/test_regress/t/t_cast_signed.v index 9a3832675..9bd913224 100644 --- a/test_regress/t/t_cast_signed.v +++ b/test_regress/t/t_cast_signed.v @@ -13,7 +13,6 @@ module t; initial begin smaller = 8'hfa; bigger = bigger_t'(signed'(smaller)); - $display("%x", bigger); // NOCOMMIT if (bigger != 16'hfffa) $stop; $write("*-* All Finished *-*\n"); diff --git a/test_regress/t/t_mem_trace_split.py b/test_regress/t/t_mem_trace_split.py index cfdafbaff..0e34ae2c7 100755 --- a/test_regress/t/t_mem_trace_split.py +++ b/test_regress/t/t_mem_trace_split.py @@ -15,7 +15,7 @@ test.compile(verilator_flags2=["--trace-vcd", "--trace-structs", "--output-split if test.vlt_all: test.file_grep_count(test.obj_dir + "/V" + test.name + "__Trace__0.cpp", - r'void Vt.*trace_chg_.*sub.*{', 3) + r'void Vt.*trace_chg_.*sub.*{', 3 if test.vltmt else 1) test.execute() diff --git a/test_regress/t/t_trace_array_const_no_const.py b/test_regress/t/t_trace_array_const_no_const.py new file mode 100755 index 000000000..61e92d663 --- /dev/null +++ b/test_regress/t/t_trace_array_const_no_const.py @@ -0,0 +1,18 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of either the GNU Lesser General Public License Version 3 +# or the Perl Artistic License Version 2.0. +# SPDX-FileCopyrightText: 2026 Wilson Snyder +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios("simulator_st") + +test.compile(verilator_flags2=["--trace", "--trace-structs"]) + +test.execute() + +test.passes() diff --git a/test_regress/t/t_trace_array_const_no_const.v b/test_regress/t/t_trace_array_const_no_const.v new file mode 100644 index 000000000..b08f046a3 --- /dev/null +++ b/test_regress/t/t_trace_array_const_no_const.v @@ -0,0 +1,40 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain. +// SPDX-FileCopyrightText: 2026 Wilson Snyder +// SPDX-License-Identifier: CC0-1.0 + +module t (/*AUTOARG*/ + // Inputs + clk + ); + input clk; + + int cyc; + initial cyc = 0; + + always_ff @(posedge clk) begin + cyc <= cyc + 1; + if (cyc == 2) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end + + sub the_sub (.*); + +endmodule + +module sub_sub +( + input logic [4-1:0][32-1:0] data_in +); +endmodule + +module sub (); + logic [4-1:0][32-1:0][1-1:0] some_data; + sub_sub + the_sub_sub ( + .data_in (some_data) + ); +endmodule diff --git a/test_regress/t/t_trace_complex_2_structs.out b/test_regress/t/t_trace_complex_2_structs.out new file mode 100644 index 000000000..ae6cc6a2f --- /dev/null +++ b/test_regress/t/t_trace_complex_2_structs.out @@ -0,0 +1,105 @@ +$version Generated by VerilatedVcd $end +$timescale 1ps $end + $scope module top $end + $var wire 1 . clk $end + $var wire 1 / clk2 $end + $scope module $unit $end + $var wire 1 2 global_bit $end + $upscope $end + $scope module t $end + $var wire 1 . clk $end + $var wire 1 / clk2 $end + $var wire 32 0 cyc [31:0] $end + $scope module v_strp $end + $var wire 1 1 b1 $end + $var wire 1 " b0 $end + $upscope $end + $scope module v_strp2 $end + $var wire 1 # b1 $end + $var wire 1 $ b0 $end + $upscope $end + $var wire 1 % foo $end + $var wire 8 & unpacked_array[-7] [7:0] $end + $var wire 8 ' unpacked_array[-6] [7:0] $end + $var wire 8 ( unpacked_array[-5] [7:0] $end + $var wire 8 ) unpacked_array[-4] [7:0] $end + $var wire 8 * unpacked_array[-3] [7:0] $end + $var wire 8 + unpacked_array[-2] [7:0] $end + $var wire 8 , unpacked_array[-1] [7:0] $end + $var wire 8 - unpacked_array[0] [7:0] $end + $upscope $end + $upscope $end +$enddefinitions $end + + +#0 +0" +0# +0$ +0% +b00000000 & +b00000000 ' +b00000000 ( +b00000000 ) +b00000000 * +b00000000 + +b00000000 , +b00000000 - +0. +0/ +b00000000000000000000000000000000 0 +01 +02 +#10 +1# +1$ +1% +1. +b00000000000000000000000000000001 0 +#15 +0. +#20 +1" +0# +0$ +0% +1. +b00000000000000000000000000000010 0 +#25 +0. +#30 +0" +1# +1$ +1% +b00000001 - +1. +b00000000000000000000000000000011 0 +#35 +0. +#40 +1" +0# +0$ +0% +1. +b00000000000000000000000000000100 0 +#45 +0. +#50 +0" +1# +1$ +1% +b00000010 - +1. +b00000000000000000000000000000101 0 +#55 +0. +#60 +1" +0# +0$ +0% +1. +b00000000000000000000000000000110 0 diff --git a/test_regress/t/t_trace_complex_2_structs.py b/test_regress/t/t_trace_complex_2_structs.py new file mode 100755 index 000000000..58946bb46 --- /dev/null +++ b/test_regress/t/t_trace_complex_2_structs.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of either the GNU Lesser General Public License Version 3 +# or the Perl Artistic License Version 2.0. +# SPDX-FileCopyrightText: 2026 Wilson Snyder +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios("simulator") + +test.compile(verilator_flags2=["--cc --trace-vcd --trace-structs --no-trace-params"]) + +trace_cpp = test.obj_dir + "/" + test.vm_prefix + "__Trace__0.cpp" +test.file_grep(trace_cpp, r"^ *Vt_.*trace_chg_dtype.*t__DOT__v_strp2") +test.file_grep_count(trace_cpp, r"^ *Vt_.*trace_chg_dtype", 1) + +test.execute() + +test.vcd_identical(test.trace_filename, test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_trace_complex_2_structs.v b/test_regress/t/t_trace_complex_2_structs.v new file mode 100644 index 000000000..6ffbc8c51 --- /dev/null +++ b/test_regress/t/t_trace_complex_2_structs.v @@ -0,0 +1,41 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain. +// SPDX-FileCopyrightText: 2026 Wilson Snyder +// SPDX-License-Identifier: CC0-1.0 + +bit global_bit; + +module t (clk, clk2); + input clk; + input clk2; + integer cyc = 0; + + typedef struct packed { + bit b1; + bit b0; + } strp_t; + + strp_t v_strp, v_strp2; + logic foo; + + logic [7:0] unpacked_array[-7:0]; + + always @ (posedge clk) begin + cyc <= cyc + 1; + foo <= ~foo; + v_strp.b0 <= cyc[0]; + v_strp2 <= ~v_strp2; + unpacked_array[0] = cyc[8:1]; + if (cyc == 5) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end + + always @(posedge clk2) begin + v_strp.b1 <= cyc[1]; + for (int i = -1; i > -8; i--) + unpacked_array[i] = cyc[7:0]; + end +endmodule diff --git a/test_regress/t/t_trace_complex_3_structs.out b/test_regress/t/t_trace_complex_3_structs.out new file mode 100644 index 000000000..c5dd775fd --- /dev/null +++ b/test_regress/t/t_trace_complex_3_structs.out @@ -0,0 +1,94 @@ +$version Generated by VerilatedVcd $end +$timescale 1ps $end + $scope module top $end + $var wire 1 - clk $end + $var wire 1 . clk2 $end + $scope module $unit $end + $var wire 1 2 global_bit $end + $upscope $end + $scope module t $end + $var wire 1 - clk $end + $var wire 1 . clk2 $end + $var wire 32 / cyc [31:0] $end + $scope module v_strp $end + $var wire 1 0 b1 $end + $var wire 1 " b0 $end + $upscope $end + $scope module v_strp2 $end + $var wire 1 1 b1 $end + $var wire 1 # b0 $end + $upscope $end + $var wire 1 $ foo $end + $var wire 8 % unpacked_array[-7] [7:0] $end + $var wire 8 & unpacked_array[-6] [7:0] $end + $var wire 8 ' unpacked_array[-5] [7:0] $end + $var wire 8 ( unpacked_array[-4] [7:0] $end + $var wire 8 ) unpacked_array[-3] [7:0] $end + $var wire 8 * unpacked_array[-2] [7:0] $end + $var wire 8 + unpacked_array[-1] [7:0] $end + $var wire 8 , unpacked_array[0] [7:0] $end + $upscope $end + $upscope $end +$enddefinitions $end + + +#0 +0" +0# +0$ +b00000000 % +b00000000 & +b00000000 ' +b00000000 ( +b00000000 ) +b00000000 * +b00000000 + +b00000000 , +0- +0. +b00000000000000000000000000000000 / +00 +01 +02 +#10 +1$ +1- +b00000000000000000000000000000001 / +#15 +0- +#20 +1" +0$ +1- +b00000000000000000000000000000010 / +#25 +0- +#30 +0" +1$ +b00000001 , +1- +b00000000000000000000000000000011 / +#35 +0- +#40 +1" +0$ +1- +b00000000000000000000000000000100 / +#45 +0- +#50 +0" +1# +1$ +b00000010 , +1- +b00000000000000000000000000000101 / +#55 +0- +#60 +1" +0$ +1- +b00000000000000000000000000000110 / diff --git a/test_regress/t/t_trace_complex_3_structs.py b/test_regress/t/t_trace_complex_3_structs.py new file mode 100755 index 000000000..0ac7a13d6 --- /dev/null +++ b/test_regress/t/t_trace_complex_3_structs.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of either the GNU Lesser General Public License Version 3 +# or the Perl Artistic License Version 2.0. +# SPDX-FileCopyrightText: 2026 Wilson Snyder +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios("simulator") + +test.compile(verilator_flags2=["--cc --trace-vcd --trace-structs --no-trace-params"]) + +trace_cpp = test.obj_dir + "/" + test.vm_prefix + "__Trace__0.cpp" +test.file_grep_count(trace_cpp, r"^ *Vt_.*trace_chg_dtype", 0) + +test.execute() + +test.vcd_identical(test.trace_filename, test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_trace_complex_3_structs.v b/test_regress/t/t_trace_complex_3_structs.v new file mode 100644 index 000000000..6ee98d791 --- /dev/null +++ b/test_regress/t/t_trace_complex_3_structs.v @@ -0,0 +1,42 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain. +// SPDX-FileCopyrightText: 2026 Wilson Snyder +// SPDX-License-Identifier: CC0-1.0 + +bit global_bit; + +module t (clk, clk2); + input clk; + input clk2; + integer cyc = 0; + + typedef struct packed { + bit b1; + bit b0; + } strp_t; + + strp_t v_strp, v_strp2; + logic foo; + + logic [7:0] unpacked_array[-7:0]; + + always @ (posedge clk) begin + cyc <= cyc + 1; + foo <= ~foo; + v_strp.b0 <= cyc[0]; + v_strp2.b0 <= cyc[2]; + unpacked_array[0] = cyc[8:1]; + if (cyc == 5) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end + + always @(posedge clk2) begin + v_strp.b1 <= cyc[1]; + v_strp2.b1 <= cyc[3]; + for (int i = -1; i > -8; i--) + unpacked_array[i] = cyc[7:0]; + end +endmodule diff --git a/test_regress/t/t_trace_huge_array.py b/test_regress/t/t_trace_huge_array.py new file mode 100755 index 000000000..5fc9fecce --- /dev/null +++ b/test_regress/t/t_trace_huge_array.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of either the GNU Lesser General Public License Version 3 +# or the Perl Artistic License Version 2.0. +# SPDX-FileCopyrightText: 2024 Wilson Snyder +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios("vlt_all") + +test.compile(v_flags2=[ + "--trace-vcd --trace-max-width 0 --trace-max-array 0 --output-split-ctrace 10 --trace-structs" +]) +trace_files = glob.glob(test.obj_dir + "/*Trace*.cpp") +if len(trace_files) < 10: + test.error("Too few trace files") + +test.execute() + +test.passes() diff --git a/test_regress/t/t_trace_huge_array.v b/test_regress/t/t_trace_huge_array.v new file mode 100644 index 000000000..aa71ff1d7 --- /dev/null +++ b/test_regress/t/t_trace_huge_array.v @@ -0,0 +1,29 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain. +// SPDX-FileCopyrightText: 2026 Wilson Snyder +// SPDX-License-Identifier: CC0-1.0 + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk; + int cyc = 0; + + localparam max = 1000; + logic [31:0] foo [max:0]; + logic [max:0] [15:0] [31:0] bar; + + always_ff @(posedge clk) begin + cyc <= cyc + 1; + foo[0] <= cyc; + for (int i = 1; i <= max; i++) foo[i] <= foo[i-1]; + bar <= (bar << 32) | type(bar)'(cyc); + if (cyc == 10) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end +endmodule diff --git a/test_regress/t/t_trace_type_alias.py b/test_regress/t/t_trace_type_alias.py new file mode 100755 index 000000000..29345f414 --- /dev/null +++ b/test_regress/t/t_trace_type_alias.py @@ -0,0 +1,18 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of either the GNU Lesser General Public License Version 3 +# or the Perl Artistic License Version 2.0. +# SPDX-FileCopyrightText: 2024 Wilson Snyder +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios("vlt_all") + +test.compile(v_flags2=["--trace-vcd --trace-structs"]) + +test.execute() + +test.passes() diff --git a/test_regress/t/t_trace_type_alias.v b/test_regress/t/t_trace_type_alias.v new file mode 100644 index 000000000..a139451df --- /dev/null +++ b/test_regress/t/t_trace_type_alias.v @@ -0,0 +1,46 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain. +// SPDX-FileCopyrightText: 2026 Wilson Snyder +// SPDX-License-Identifier: CC0-1.0 + +module Sub #( + parameter int data_width +)( + input clk, + output logic [data_width-1:0] read_data +); + logic [0:0][data_width-1:0] read_data_2d; + always_ff @(posedge clk) read_data_2d <= $random; + always_comb read_data = read_data_2d[0]; +endmodule + +module t (); + typedef struct packed { + logic [7:0] field_a; + logic [7:0] field_b; + logic [7:0] field_c; + logic field_d; + logic field_e; + logic field_f; + logic field_g; + logic field_h; + logic field_i; + logic field_j; + logic field_k; + } struct_t; + struct_t the_struct; + logic clk; + + Sub #( + .data_width ($bits(struct_t)) + ) the_sub( + .clk, + .read_data (the_struct) + ); + + initial begin + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule diff --git a/test_regress/t/t_trace_type_dupes.out b/test_regress/t/t_trace_type_dupes.out new file mode 100644 index 000000000..19f1a4fb4 --- /dev/null +++ b/test_regress/t/t_trace_type_dupes.out @@ -0,0 +1,1522 @@ +$version Generated by VerilatedVcd $end +$timescale 1ps $end + $scope module top $end + $var wire 1 !$ clk $end + $scope module pkg $end + $var wire 17 :% SUB_ONES [16:0] $end + $var wire 17 ;% SUB_ZEROS [16:0] $end + $upscope $end + $scope module t $end + $var wire 1 !$ clk $end + $var wire 32 " cyc [31:0] $end + $var wire 4 # x [3:0] $end + $scope module gen_loop[0] $end + $var wire 32 " loop_cyc [31:0] $end + $scope module the_sub $end + $var wire 1 $ a $end + $var wire 1 % b $end + $var wire 1 & x $end + $var wire 1 ' out_2d_unpacked[0][0] $end + $var wire 1 ( out_2d_unpacked[0][1] $end + $var wire 1 ) out_2d_unpacked[0][2] $end + $var wire 1 * out_2d_unpacked[0][3] $end + $var wire 1 + out_2d_unpacked[1][0] $end + $var wire 1 , out_2d_unpacked[1][1] $end + $var wire 1 - out_2d_unpacked[1][2] $end + $var wire 1 . out_2d_unpacked[1][3] $end + $var wire 1 / out_2d_unpacked[2][0] $end + $var wire 1 0 out_2d_unpacked[2][1] $end + $var wire 1 1 out_2d_unpacked[2][2] $end + $var wire 1 2 out_2d_unpacked[2][3] $end + $var wire 290 3 data [289:0] $end + $var wire 32 " cyc [31:0] $end + $var wire 1 !$ clk $end + $var wire 290 3 the_struct [289:0] $end + $var wire 290 = the_structs[0] [289:0] $end + $var wire 290 G the_structs[1] [289:0] $end + $var wire 290 Q the_structs[2] [289:0] $end + $var wire 290 [ the_structs[3] [289:0] $end + $var wire 870 "$ the_packed_structs [869:0] $end + $var wire 3 e the_local_struct [2:0] $end + $var wire 3 >$ const_struct [2:0] $end + $var wire 3 f the_typedefed_struct [2:0] $end + $scope module the_local_unpacked_struct $end + $var wire 1 g field_a $end + $var wire 1 h field_b $end + $var wire 1 i field_c $end + $upscope $end + $var wire 8 j the_local_union [7:0] $end + $var wire 64 k the_logic_array [63:0] $end + $var wire 64 m the_other_logic_array [63:0] $end + $var wire 16 o the_unpacked_array[0] [15:0] $end + $var wire 16 p the_unpacked_array[1] [15:0] $end + $var wire 16 q the_unpacked_array[2] [15:0] $end + $var wire 16 r the_unpacked_array[3] [15:0] $end + $var wire 16 s the_unpacked_array[4] [15:0] $end + $var wire 1 t the_2d_unpacked[0][0] $end + $var wire 1 u the_2d_unpacked[0][1] $end + $var wire 1 v the_2d_unpacked[0][2] $end + $var wire 1 w the_2d_unpacked[0][3] $end + $var wire 1 x the_2d_unpacked[1][0] $end + $var wire 1 y the_2d_unpacked[1][1] $end + $var wire 1 z the_2d_unpacked[1][2] $end + $var wire 1 { the_2d_unpacked[1][3] $end + $var wire 1 | the_2d_unpacked[2][0] $end + $var wire 1 } the_2d_unpacked[2][1] $end + $var wire 1 ~ the_2d_unpacked[2][2] $end + $var wire 1 !! the_2d_unpacked[2][3] $end + $var wire 8 ?$ two_fours [7:0] $end + $var wire 8 @$ two_fours_var [7:0] $end + $upscope $end + $upscope $end + $scope module gen_loop[1] $end + $var wire 32 "! loop_cyc [31:0] $end + $scope module the_sub $end + $var wire 1 #! a $end + $var wire 1 $! b $end + $var wire 1 %! x $end + $var wire 1 &! out_2d_unpacked[0][0] $end + $var wire 1 '! out_2d_unpacked[0][1] $end + $var wire 1 (! out_2d_unpacked[0][2] $end + $var wire 1 )! out_2d_unpacked[0][3] $end + $var wire 1 *! out_2d_unpacked[1][0] $end + $var wire 1 +! out_2d_unpacked[1][1] $end + $var wire 1 ,! out_2d_unpacked[1][2] $end + $var wire 1 -! out_2d_unpacked[1][3] $end + $var wire 1 .! out_2d_unpacked[2][0] $end + $var wire 1 /! out_2d_unpacked[2][1] $end + $var wire 1 0! out_2d_unpacked[2][2] $end + $var wire 1 1! out_2d_unpacked[2][3] $end + $var wire 290 2! data [289:0] $end + $var wire 32 "! cyc [31:0] $end + $var wire 1 !$ clk $end + $var wire 290 2! the_struct [289:0] $end + $var wire 290 $ const_struct [2:0] $end + $var wire 3 e! the_typedefed_struct [2:0] $end + $scope module the_local_unpacked_struct $end + $var wire 1 f! field_a $end + $var wire 1 g! field_b $end + $var wire 1 h! field_c $end + $upscope $end + $var wire 8 i! the_local_union [7:0] $end + $var wire 64 j! the_logic_array [63:0] $end + $var wire 64 l! the_other_logic_array [63:0] $end + $var wire 16 n! the_unpacked_array[0] [15:0] $end + $var wire 16 o! the_unpacked_array[1] [15:0] $end + $var wire 16 p! the_unpacked_array[2] [15:0] $end + $var wire 16 q! the_unpacked_array[3] [15:0] $end + $var wire 16 r! the_unpacked_array[4] [15:0] $end + $var wire 1 s! the_2d_unpacked[0][0] $end + $var wire 1 t! the_2d_unpacked[0][1] $end + $var wire 1 u! the_2d_unpacked[0][2] $end + $var wire 1 v! the_2d_unpacked[0][3] $end + $var wire 1 w! the_2d_unpacked[1][0] $end + $var wire 1 x! the_2d_unpacked[1][1] $end + $var wire 1 y! the_2d_unpacked[1][2] $end + $var wire 1 z! the_2d_unpacked[1][3] $end + $var wire 1 {! the_2d_unpacked[2][0] $end + $var wire 1 |! the_2d_unpacked[2][1] $end + $var wire 1 }! the_2d_unpacked[2][2] $end + $var wire 1 ~! the_2d_unpacked[2][3] $end + $var wire 8 ?$ two_fours [7:0] $end + $var wire 8 ]$ two_fours_var [7:0] $end + $upscope $end + $upscope $end + $scope module gen_loop[2] $end + $var wire 32 !" loop_cyc [31:0] $end + $scope module the_sub $end + $var wire 1 "" a $end + $var wire 1 #" b $end + $var wire 1 $" x $end + $var wire 1 %" out_2d_unpacked[0][0] $end + $var wire 1 &" out_2d_unpacked[0][1] $end + $var wire 1 '" out_2d_unpacked[0][2] $end + $var wire 1 (" out_2d_unpacked[0][3] $end + $var wire 1 )" out_2d_unpacked[1][0] $end + $var wire 1 *" out_2d_unpacked[1][1] $end + $var wire 1 +" out_2d_unpacked[1][2] $end + $var wire 1 ," out_2d_unpacked[1][3] $end + $var wire 1 -" out_2d_unpacked[2][0] $end + $var wire 1 ." out_2d_unpacked[2][1] $end + $var wire 1 /" out_2d_unpacked[2][2] $end + $var wire 1 0" out_2d_unpacked[2][3] $end + $var wire 290 1" data [289:0] $end + $var wire 32 !" cyc [31:0] $end + $var wire 1 !$ clk $end + $var wire 290 1" the_struct [289:0] $end + $var wire 290 ;" the_structs[0] [289:0] $end + $var wire 290 E" the_structs[1] [289:0] $end + $var wire 290 O" the_structs[2] [289:0] $end + $var wire 290 Y" the_structs[3] [289:0] $end + $var wire 870 ^$ the_packed_structs [869:0] $end + $var wire 3 c" the_local_struct [2:0] $end + $var wire 3 >$ const_struct [2:0] $end + $var wire 3 d" the_typedefed_struct [2:0] $end + $scope module the_local_unpacked_struct $end + $var wire 1 e" field_a $end + $var wire 1 f" field_b $end + $var wire 1 g" field_c $end + $upscope $end + $var wire 8 h" the_local_union [7:0] $end + $var wire 64 i" the_logic_array [63:0] $end + $var wire 64 k" the_other_logic_array [63:0] $end + $var wire 16 m" the_unpacked_array[0] [15:0] $end + $var wire 16 n" the_unpacked_array[1] [15:0] $end + $var wire 16 o" the_unpacked_array[2] [15:0] $end + $var wire 16 p" the_unpacked_array[3] [15:0] $end + $var wire 16 q" the_unpacked_array[4] [15:0] $end + $var wire 1 r" the_2d_unpacked[0][0] $end + $var wire 1 s" the_2d_unpacked[0][1] $end + $var wire 1 t" the_2d_unpacked[0][2] $end + $var wire 1 u" the_2d_unpacked[0][3] $end + $var wire 1 v" the_2d_unpacked[1][0] $end + $var wire 1 w" the_2d_unpacked[1][1] $end + $var wire 1 x" the_2d_unpacked[1][2] $end + $var wire 1 y" the_2d_unpacked[1][3] $end + $var wire 1 z" the_2d_unpacked[2][0] $end + $var wire 1 {" the_2d_unpacked[2][1] $end + $var wire 1 |" the_2d_unpacked[2][2] $end + $var wire 1 }" the_2d_unpacked[2][3] $end + $var wire 8 ?$ two_fours [7:0] $end + $var wire 8 z$ two_fours_var [7:0] $end + $upscope $end + $upscope $end + $scope module gen_loop[3] $end + $var wire 32 ~" loop_cyc [31:0] $end + $scope module the_sub $end + $var wire 1 !# a $end + $var wire 1 "# b $end + $var wire 1 ## x $end + $var wire 1 $# out_2d_unpacked[0][0] $end + $var wire 1 %# out_2d_unpacked[0][1] $end + $var wire 1 &# out_2d_unpacked[0][2] $end + $var wire 1 '# out_2d_unpacked[0][3] $end + $var wire 1 (# out_2d_unpacked[1][0] $end + $var wire 1 )# out_2d_unpacked[1][1] $end + $var wire 1 *# out_2d_unpacked[1][2] $end + $var wire 1 +# out_2d_unpacked[1][3] $end + $var wire 1 ,# out_2d_unpacked[2][0] $end + $var wire 1 -# out_2d_unpacked[2][1] $end + $var wire 1 .# out_2d_unpacked[2][2] $end + $var wire 1 /# out_2d_unpacked[2][3] $end + $var wire 290 0# data [289:0] $end + $var wire 32 ~" cyc [31:0] $end + $var wire 1 !$ clk $end + $var wire 290 0# the_struct [289:0] $end + $var wire 290 :# the_structs[0] [289:0] $end + $var wire 290 D# the_structs[1] [289:0] $end + $var wire 290 N# the_structs[2] [289:0] $end + $var wire 290 X# the_structs[3] [289:0] $end + $var wire 870 {$ the_packed_structs [869:0] $end + $var wire 3 b# the_local_struct [2:0] $end + $var wire 3 >$ const_struct [2:0] $end + $var wire 3 c# the_typedefed_struct [2:0] $end + $scope module the_local_unpacked_struct $end + $var wire 1 d# field_a $end + $var wire 1 e# field_b $end + $var wire 1 f# field_c $end + $upscope $end + $var wire 8 g# the_local_union [7:0] $end + $var wire 64 h# the_logic_array [63:0] $end + $var wire 64 j# the_other_logic_array [63:0] $end + $var wire 16 l# the_unpacked_array[0] [15:0] $end + $var wire 16 m# the_unpacked_array[1] [15:0] $end + $var wire 16 n# the_unpacked_array[2] [15:0] $end + $var wire 16 o# the_unpacked_array[3] [15:0] $end + $var wire 16 p# the_unpacked_array[4] [15:0] $end + $var wire 1 q# the_2d_unpacked[0][0] $end + $var wire 1 r# the_2d_unpacked[0][1] $end + $var wire 1 s# the_2d_unpacked[0][2] $end + $var wire 1 t# the_2d_unpacked[0][3] $end + $var wire 1 u# the_2d_unpacked[1][0] $end + $var wire 1 v# the_2d_unpacked[1][1] $end + $var wire 1 w# the_2d_unpacked[1][2] $end + $var wire 1 x# the_2d_unpacked[1][3] $end + $var wire 1 y# the_2d_unpacked[2][0] $end + $var wire 1 z# the_2d_unpacked[2][1] $end + $var wire 1 {# the_2d_unpacked[2][2] $end + $var wire 1 |# the_2d_unpacked[2][3] $end + $var wire 8 ?$ two_fours [7:0] $end + $var wire 8 9% two_fours_var [7:0] $end + $upscope $end + $upscope $end + $scope module the_intf_a $end + $var wire 1 !$ clk $end + $var wire 32 }# data [31:0] $end + $var wire 32 }# data_typed [31:0] $end + $upscope $end + $scope module the_intf_b $end + $var wire 1 !$ clk $end + $var wire 32 ~# data [31:0] $end + $var wire 32 ~# data_typed [31:0] $end + $upscope $end + $upscope $end + $upscope $end +$enddefinitions $end + + +#0 +b00000000000000000000000000000000 " +b0000 # +0$ +0% +0& +0' +0( +0) +0* +0+ +0, +0- +0. +0/ +00 +01 +02 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+b11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 field_b [5:0] $end + $var wire 10 ? field_c [9:0] $end + $upscope $end + $upscope $end + $var wire 32 " cyc [31:0] $end + $var wire 1 $% clk $end + $scope module the_struct $end + $var wire 1 3 foo $end + $var wire 32 4 bar[0] [31:0] $end + $var wire 32 5 bar[1] [31:0] $end + $var wire 32 6 bar[2] [31:0] $end + $var wire 32 7 bar[3] [31:0] $end + $var wire 16 8 baz [15:0] $end + $var wire 128 9 qux [127:0] $end + $scope module sub_struct $end + $var wire 1 = field_a $end + $var wire 6 > field_b [5:0] $end + $var wire 10 ? field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[0] $end + $var wire 1 @ foo $end + $var wire 32 A bar[0] [31:0] $end + $var wire 32 B bar[1] [31:0] $end + $var wire 32 C bar[2] [31:0] $end + $var wire 32 D bar[3] [31:0] $end + $var wire 16 E baz [15:0] $end + $var wire 128 F qux [127:0] $end + $scope module sub_struct $end + $var wire 1 J field_a $end + $var wire 6 K field_b [5:0] $end + $var wire 10 L field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[1] $end + $var wire 1 M foo $end + $var wire 32 N bar[0] [31:0] $end + $var wire 32 O bar[1] [31:0] $end + $var wire 32 P bar[2] [31:0] $end + $var wire 32 Q bar[3] [31:0] $end + $var wire 16 R baz [15:0] $end + $var wire 128 S qux [127:0] $end + $scope module sub_struct $end + $var wire 1 W field_a $end + $var wire 6 X field_b [5:0] $end + $var wire 10 Y field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[2] $end + $var wire 1 Z foo $end + $var wire 32 [ bar[0] [31:0] $end + $var wire 32 \ bar[1] [31:0] $end + $var wire 32 ] bar[2] [31:0] $end + $var wire 32 ^ bar[3] [31:0] $end + $var wire 16 _ baz [15:0] $end + $var wire 128 ` qux [127:0] $end + $scope module sub_struct $end + $var wire 1 d field_a $end + $var wire 6 e field_b [5:0] $end + $var wire 10 f field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[3] $end + $var wire 1 g foo $end + $var wire 32 h bar[0] [31:0] $end + $var wire 32 i bar[1] [31:0] $end + $var wire 32 j bar[2] [31:0] $end + $var wire 32 k bar[3] [31:0] $end + $var wire 16 l baz [15:0] $end + $var wire 128 m qux [127:0] $end + $scope module sub_struct $end + $var wire 1 q field_a $end + $var wire 6 r field_b [5:0] $end + $var wire 10 s field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[0] $end + $var wire 1 %% foo $end + $var wire 32 &% bar[0] [31:0] $end + $var wire 32 '% bar[1] [31:0] $end + $var wire 32 (% bar[2] [31:0] $end + $var wire 32 )% bar[3] [31:0] $end + $var wire 16 *% baz [15:0] $end + $var wire 128 +% qux [127:0] $end + $scope module sub_struct $end + $var wire 1 /% field_a $end + $var wire 6 0% field_b [5:0] $end + $var wire 10 1% field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[1] $end + $var wire 1 2% foo $end + $var wire 32 3% bar[0] [31:0] $end + $var wire 32 4% bar[1] [31:0] $end + $var wire 32 5% bar[2] [31:0] $end + $var wire 32 6% bar[3] [31:0] $end + $var wire 16 7% baz [15:0] $end + $var wire 128 8% qux [127:0] $end + $scope module sub_struct $end + $var wire 1 <% field_a $end + $var wire 6 =% field_b [5:0] $end + $var wire 10 >% field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[2] $end + $var wire 1 ?% foo $end + $var wire 32 @% bar[0] [31:0] $end + $var wire 32 A% bar[1] [31:0] $end + $var wire 32 B% bar[2] [31:0] $end + $var wire 32 C% bar[3] [31:0] $end + $var wire 16 D% baz [15:0] $end + $var wire 128 E% qux [127:0] $end + $scope module sub_struct $end + $var wire 1 I% field_a $end + $var wire 6 J% field_b [5:0] $end + $var wire 10 K% field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_local_struct $end + $var wire 1 t abc $end + $var wire 1 u def $end + $var wire 1 v xyz $end + $upscope $end + $scope module const_struct $end + $var wire 1 L% abc $end + $var wire 1 M% def $end + $var wire 1 L% xyz $end + $upscope $end + $scope module the_typedefed_struct $end + $var wire 1 w abc $end + $var wire 1 x def $end + $var wire 1 y xyz $end + $upscope $end + $scope module the_local_unpacked_struct $end + $var wire 1 z field_a $end + $var wire 1 { field_b $end + $var wire 1 | field_c $end + $upscope $end + $scope module the_local_union $end + $scope module union_a $end + $var wire 8 } field_0 [7:0] $end + $upscope $end + $scope module union_b $end + $var wire 4 ~ field_1 [3:0] $end + $var wire 4 !! field_2 [3:0] $end + $upscope $end + $scope module union_c $end + $var wire 2 "! field_3 [1:0] $end + $var wire 6 #! field_4 [5:0] $end + $upscope $end + $upscope $end + $var wire 32 $! the_logic_array[0] [31:0] $end + $var wire 32 %! the_logic_array[1] [31:0] $end + $var wire 32 &! the_other_logic_array[0] [31:0] $end + $var wire 32 '! the_other_logic_array[1] [31:0] $end + $var wire 16 (! the_unpacked_array[0] [15:0] $end + $var wire 16 )! the_unpacked_array[1] [15:0] $end + $var wire 16 *! the_unpacked_array[2] [15:0] $end + $var wire 16 +! the_unpacked_array[3] [15:0] $end + $var wire 16 ,! the_unpacked_array[4] [15:0] $end + $var wire 1 -! the_2d_unpacked[0][0] $end + $var wire 1 .! the_2d_unpacked[0][1] $end + $var wire 1 /! the_2d_unpacked[0][2] $end + $var wire 1 0! the_2d_unpacked[0][3] $end + $var wire 1 1! the_2d_unpacked[1][0] $end + $var wire 1 2! the_2d_unpacked[1][1] $end + $var wire 1 3! the_2d_unpacked[1][2] $end + $var wire 1 4! the_2d_unpacked[1][3] $end + $var wire 1 5! the_2d_unpacked[2][0] $end + $var wire 1 6! the_2d_unpacked[2][1] $end + $var wire 1 7! the_2d_unpacked[2][2] $end + $var wire 1 8! the_2d_unpacked[2][3] $end + $var wire 4 N% two_fours[0] [3:0] $end + $var wire 4 O% two_fours[1] [3:0] $end + $var wire 4 P% two_fours_var[0] [3:0] $end + $var wire 4 Q% two_fours_var[1] [3:0] $end + $upscope $end + $upscope $end + $scope module gen_loop[1] $end + $var wire 32 9! loop_cyc [31:0] $end + $scope module the_sub $end + $var wire 1 :! a $end + $var wire 1 ;! b $end + $var wire 1 ! out_2d_unpacked[0][1] $end + $var wire 1 ?! out_2d_unpacked[0][2] $end + $var wire 1 @! out_2d_unpacked[0][3] $end + $var wire 1 A! out_2d_unpacked[1][0] $end + $var wire 1 B! out_2d_unpacked[1][1] $end + $var wire 1 C! out_2d_unpacked[1][2] $end + $var wire 1 D! out_2d_unpacked[1][3] $end + $var wire 1 E! out_2d_unpacked[2][0] $end + $var wire 1 F! out_2d_unpacked[2][1] $end + $var wire 1 G! out_2d_unpacked[2][2] $end + $var wire 1 H! out_2d_unpacked[2][3] $end + $scope module data $end + $var wire 1 I! foo $end + $var wire 32 J! bar[0] [31:0] $end + $var wire 32 K! bar[1] [31:0] $end + $var wire 32 L! bar[2] [31:0] $end + $var wire 32 M! bar[3] [31:0] $end + $var wire 16 N! baz [15:0] $end + $var wire 128 O! qux [127:0] $end + $scope module sub_struct $end + $var wire 1 S! field_a $end + $var wire 6 T! field_b [5:0] $end + $var wire 10 U! field_c [9:0] $end + $upscope $end + $upscope $end + $var wire 32 9! cyc [31:0] $end + $var wire 1 $% clk $end + $scope module the_struct $end + $var wire 1 I! foo $end + $var wire 32 J! bar[0] [31:0] $end + $var wire 32 K! bar[1] [31:0] $end + $var wire 32 L! bar[2] [31:0] $end + $var wire 32 M! bar[3] [31:0] $end + $var wire 16 N! baz [15:0] $end + $var wire 128 O! qux [127:0] $end + $scope module sub_struct $end + $var wire 1 S! field_a $end + $var wire 6 T! field_b [5:0] $end + $var wire 10 U! field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[0] $end + $var wire 1 V! foo $end + $var wire 32 W! bar[0] [31:0] $end + $var wire 32 X! bar[1] [31:0] $end + $var wire 32 Y! bar[2] [31:0] $end + $var wire 32 Z! bar[3] [31:0] $end + $var wire 16 [! baz [15:0] $end + $var wire 128 \! qux [127:0] $end + $scope module sub_struct $end + $var wire 1 `! field_a $end + $var wire 6 a! field_b [5:0] $end + $var wire 10 b! field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[1] $end + $var wire 1 c! foo $end + $var wire 32 d! bar[0] [31:0] $end + $var wire 32 e! bar[1] [31:0] $end + $var wire 32 f! bar[2] [31:0] $end + $var wire 32 g! bar[3] [31:0] $end + $var wire 16 h! baz [15:0] $end + $var wire 128 i! qux [127:0] $end + $scope module sub_struct $end + $var wire 1 m! field_a $end + $var wire 6 n! field_b [5:0] $end + $var wire 10 o! field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[2] $end + $var wire 1 p! foo $end + $var wire 32 q! bar[0] [31:0] $end + $var wire 32 r! bar[1] [31:0] $end + $var wire 32 s! bar[2] [31:0] $end + $var wire 32 t! bar[3] [31:0] $end + $var wire 16 u! baz [15:0] $end + $var wire 128 v! qux [127:0] $end + $scope module sub_struct $end + $var wire 1 z! field_a $end + $var wire 6 {! field_b [5:0] $end + $var wire 10 |! field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[3] $end + $var wire 1 }! foo $end + $var wire 32 ~! bar[0] [31:0] $end + $var wire 32 !" bar[1] [31:0] $end + $var wire 32 "" bar[2] [31:0] $end + $var wire 32 #" bar[3] [31:0] $end + $var wire 16 $" baz [15:0] $end + $var wire 128 %" qux [127:0] $end + $scope module sub_struct $end + $var wire 1 )" field_a $end + $var wire 6 *" field_b [5:0] $end + $var wire 10 +" field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[0] $end + $var wire 1 R% foo $end + $var wire 32 S% bar[0] [31:0] $end + $var wire 32 T% bar[1] [31:0] $end + $var wire 32 U% bar[2] [31:0] $end + $var wire 32 V% bar[3] [31:0] $end + $var wire 16 W% baz [15:0] $end + $var wire 128 X% qux [127:0] $end + $scope module sub_struct $end + $var wire 1 \% field_a $end + $var wire 6 ]% field_b [5:0] $end + $var wire 10 ^% field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[1] $end + $var wire 1 _% foo $end + $var wire 32 `% bar[0] [31:0] $end + $var wire 32 a% bar[1] [31:0] $end + $var wire 32 b% bar[2] [31:0] $end + $var wire 32 c% bar[3] [31:0] $end + $var wire 16 d% baz [15:0] $end + $var wire 128 e% qux [127:0] $end + $scope module sub_struct $end + $var wire 1 i% field_a $end + $var wire 6 j% field_b [5:0] $end + $var wire 10 k% field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[2] $end + $var wire 1 l% foo $end + $var wire 32 m% bar[0] [31:0] $end + $var wire 32 n% bar[1] [31:0] $end + $var wire 32 o% bar[2] [31:0] $end + $var wire 32 p% bar[3] [31:0] $end + $var wire 16 q% baz [15:0] $end + $var wire 128 r% qux [127:0] $end + $scope module sub_struct $end + $var wire 1 v% field_a $end + $var wire 6 w% field_b [5:0] $end + $var wire 10 x% field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_local_struct $end + $var wire 1 ," abc $end + $var wire 1 -" def $end + $var wire 1 ." xyz $end + $upscope $end + $scope module const_struct $end + $var wire 1 L% abc $end + $var wire 1 M% def $end + $var wire 1 L% xyz $end + $upscope $end + $scope module the_typedefed_struct $end + $var wire 1 /" abc $end + $var wire 1 0" def $end + $var wire 1 1" xyz $end + $upscope $end + $scope module the_local_unpacked_struct $end + $var wire 1 2" field_a $end + $var wire 1 3" field_b $end + $var wire 1 4" field_c $end + $upscope $end + $scope module the_local_union $end + $scope module union_a $end + $var wire 8 5" field_0 [7:0] $end + $upscope $end + $scope module union_b $end + $var wire 4 6" field_1 [3:0] $end + $var wire 4 7" field_2 [3:0] $end + $upscope $end + $scope module union_c $end + $var wire 2 8" field_3 [1:0] $end + $var wire 6 9" field_4 [5:0] $end + $upscope $end + $upscope $end + $var wire 32 :" the_logic_array[0] [31:0] $end + $var wire 32 ;" the_logic_array[1] [31:0] $end + $var wire 32 <" the_other_logic_array[0] [31:0] $end + $var wire 32 =" the_other_logic_array[1] [31:0] $end + $var wire 16 >" the_unpacked_array[0] [15:0] $end + $var wire 16 ?" the_unpacked_array[1] [15:0] $end + $var wire 16 @" the_unpacked_array[2] [15:0] $end + $var wire 16 A" the_unpacked_array[3] [15:0] $end + $var wire 16 B" the_unpacked_array[4] [15:0] $end + $var wire 1 C" the_2d_unpacked[0][0] $end + $var wire 1 D" the_2d_unpacked[0][1] $end + $var wire 1 E" the_2d_unpacked[0][2] $end + $var wire 1 F" the_2d_unpacked[0][3] $end + $var wire 1 G" the_2d_unpacked[1][0] $end + $var wire 1 H" the_2d_unpacked[1][1] $end + $var wire 1 I" the_2d_unpacked[1][2] $end + $var wire 1 J" the_2d_unpacked[1][3] $end + $var wire 1 K" the_2d_unpacked[2][0] $end + $var wire 1 L" the_2d_unpacked[2][1] $end + $var wire 1 M" the_2d_unpacked[2][2] $end + $var wire 1 N" the_2d_unpacked[2][3] $end + $var wire 4 N% two_fours[0] [3:0] $end + $var wire 4 O% two_fours[1] [3:0] $end + $var wire 4 y% two_fours_var[0] [3:0] $end + $var wire 4 z% two_fours_var[1] [3:0] $end + $upscope $end + $upscope $end + $scope module gen_loop[2] $end + $var wire 32 O" loop_cyc [31:0] $end + $scope module the_sub $end + $var wire 1 P" a $end + $var wire 1 Q" b $end + $var wire 1 R" x $end + $var wire 1 S" out_2d_unpacked[0][0] $end + $var wire 1 T" out_2d_unpacked[0][1] $end + $var wire 1 U" out_2d_unpacked[0][2] $end + $var wire 1 V" out_2d_unpacked[0][3] $end + $var wire 1 W" out_2d_unpacked[1][0] $end + $var wire 1 X" out_2d_unpacked[1][1] $end + $var wire 1 Y" out_2d_unpacked[1][2] $end + $var wire 1 Z" out_2d_unpacked[1][3] $end + $var wire 1 [" out_2d_unpacked[2][0] $end + $var wire 1 \" out_2d_unpacked[2][1] $end + $var wire 1 ]" out_2d_unpacked[2][2] $end + $var wire 1 ^" out_2d_unpacked[2][3] $end + $scope module data $end + $var wire 1 _" foo $end + $var wire 32 `" bar[0] [31:0] $end + $var wire 32 a" bar[1] [31:0] $end + $var wire 32 b" bar[2] [31:0] $end + $var wire 32 c" bar[3] [31:0] $end + $var wire 16 d" baz [15:0] $end + $var wire 128 e" qux [127:0] $end + $scope module sub_struct $end + $var wire 1 i" field_a $end + $var wire 6 j" field_b [5:0] $end + $var wire 10 k" field_c [9:0] $end + $upscope $end + $upscope $end + $var wire 32 O" cyc [31:0] $end + $var wire 1 $% clk $end + $scope module the_struct $end + $var wire 1 _" foo $end + $var wire 32 `" bar[0] [31:0] $end + $var wire 32 a" bar[1] [31:0] $end + $var wire 32 b" bar[2] [31:0] $end + $var wire 32 c" bar[3] [31:0] $end + $var wire 16 d" baz [15:0] $end + $var wire 128 e" qux [127:0] $end + $scope module sub_struct $end + $var wire 1 i" field_a $end + $var wire 6 j" field_b [5:0] $end + $var wire 10 k" field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[0] $end + $var wire 1 l" foo $end + $var wire 32 m" bar[0] [31:0] $end + $var wire 32 n" bar[1] [31:0] $end + $var wire 32 o" bar[2] [31:0] $end + $var wire 32 p" bar[3] [31:0] $end + $var wire 16 q" baz [15:0] $end + $var wire 128 r" qux [127:0] $end + $scope module sub_struct $end + $var wire 1 v" field_a $end + $var wire 6 w" field_b [5:0] $end + $var wire 10 x" field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[1] $end + $var wire 1 y" foo $end + $var wire 32 z" bar[0] [31:0] $end + $var wire 32 {" bar[1] [31:0] $end + $var wire 32 |" bar[2] [31:0] $end + $var wire 32 }" bar[3] [31:0] $end + $var wire 16 ~" baz [15:0] $end + $var wire 128 !# qux [127:0] $end + $scope module sub_struct $end + $var wire 1 %# field_a $end + $var wire 6 &# field_b [5:0] $end + $var wire 10 '# field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[2] $end + $var wire 1 (# foo $end + $var wire 32 )# bar[0] [31:0] $end + $var wire 32 *# bar[1] [31:0] $end + $var wire 32 +# bar[2] [31:0] $end + $var wire 32 ,# bar[3] [31:0] $end + $var wire 16 -# baz [15:0] $end + $var wire 128 .# qux [127:0] $end + $scope module sub_struct $end + $var wire 1 2# field_a $end + $var wire 6 3# field_b [5:0] $end + $var wire 10 4# field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[3] $end + $var wire 1 5# foo $end + $var wire 32 6# bar[0] [31:0] $end + $var wire 32 7# bar[1] [31:0] $end + $var wire 32 8# bar[2] [31:0] $end + $var wire 32 9# bar[3] [31:0] $end + $var wire 16 :# baz [15:0] $end + $var wire 128 ;# qux [127:0] $end + $scope module sub_struct $end + $var wire 1 ?# field_a $end + $var wire 6 @# field_b [5:0] $end + $var wire 10 A# field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[0] $end + $var wire 1 {% foo $end + $var wire 32 |% bar[0] [31:0] $end + $var wire 32 }% bar[1] [31:0] $end + $var wire 32 ~% bar[2] [31:0] $end + $var wire 32 !& bar[3] [31:0] $end + $var wire 16 "& baz [15:0] $end + $var wire 128 #& qux [127:0] $end + $scope module sub_struct $end + $var wire 1 '& field_a $end + $var wire 6 (& field_b [5:0] $end + $var wire 10 )& field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[1] $end + $var wire 1 *& foo $end + $var wire 32 +& bar[0] [31:0] $end + $var wire 32 ,& bar[1] [31:0] $end + $var wire 32 -& bar[2] [31:0] $end + $var wire 32 .& bar[3] [31:0] $end + $var wire 16 /& baz [15:0] $end + $var wire 128 0& qux [127:0] $end + $scope module sub_struct $end + $var wire 1 4& field_a $end + $var wire 6 5& field_b [5:0] $end + $var wire 10 6& field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[2] $end + $var wire 1 7& foo $end + $var wire 32 8& bar[0] [31:0] $end + $var wire 32 9& bar[1] [31:0] $end + $var wire 32 :& bar[2] [31:0] $end + $var wire 32 ;& bar[3] [31:0] $end + $var wire 16 <& baz [15:0] $end + $var wire 128 =& qux [127:0] $end + $scope module sub_struct $end + $var wire 1 A& field_a $end + $var wire 6 B& field_b [5:0] $end + $var wire 10 C& field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_local_struct $end + $var wire 1 B# abc $end + $var wire 1 C# def $end + $var wire 1 D# xyz $end + $upscope $end + $scope module const_struct $end + $var wire 1 L% abc $end + $var wire 1 M% def $end + $var wire 1 L% xyz $end + $upscope $end + $scope module the_typedefed_struct $end + $var wire 1 E# abc $end + $var wire 1 F# def $end + $var wire 1 G# xyz $end + $upscope $end + $scope module the_local_unpacked_struct $end + $var wire 1 H# field_a $end + $var wire 1 I# field_b $end + $var wire 1 J# field_c $end + $upscope $end + $scope module the_local_union $end + $scope module union_a $end + $var wire 8 K# field_0 [7:0] $end + $upscope $end + $scope module union_b $end + $var wire 4 L# field_1 [3:0] $end + $var wire 4 M# field_2 [3:0] $end + $upscope $end + $scope module union_c $end + $var wire 2 N# field_3 [1:0] $end + $var wire 6 O# field_4 [5:0] $end + $upscope $end + $upscope $end + $var wire 32 P# the_logic_array[0] [31:0] $end + $var wire 32 Q# the_logic_array[1] [31:0] $end + $var wire 32 R# the_other_logic_array[0] [31:0] $end + $var wire 32 S# the_other_logic_array[1] [31:0] $end + $var wire 16 T# the_unpacked_array[0] [15:0] $end + $var wire 16 U# the_unpacked_array[1] [15:0] $end + $var wire 16 V# the_unpacked_array[2] [15:0] $end + $var wire 16 W# the_unpacked_array[3] [15:0] $end + $var wire 16 X# the_unpacked_array[4] [15:0] $end + $var wire 1 Y# the_2d_unpacked[0][0] $end + $var wire 1 Z# the_2d_unpacked[0][1] $end + $var wire 1 [# the_2d_unpacked[0][2] $end + $var wire 1 \# the_2d_unpacked[0][3] $end + $var wire 1 ]# the_2d_unpacked[1][0] $end + $var wire 1 ^# the_2d_unpacked[1][1] $end + $var wire 1 _# the_2d_unpacked[1][2] $end + $var wire 1 `# the_2d_unpacked[1][3] $end + $var wire 1 a# the_2d_unpacked[2][0] $end + $var wire 1 b# the_2d_unpacked[2][1] $end + $var wire 1 c# the_2d_unpacked[2][2] $end + $var wire 1 d# the_2d_unpacked[2][3] $end + $var wire 4 N% two_fours[0] [3:0] $end + $var wire 4 O% two_fours[1] [3:0] $end + $var wire 4 D& two_fours_var[0] [3:0] $end + $var wire 4 E& two_fours_var[1] [3:0] $end + $upscope $end + $upscope $end + $scope module gen_loop[3] $end + $var wire 32 e# loop_cyc [31:0] $end + $scope module the_sub $end + $var wire 1 f# a $end + $var wire 1 g# b $end + $var wire 1 h# x $end + $var wire 1 i# out_2d_unpacked[0][0] $end + $var wire 1 j# out_2d_unpacked[0][1] $end + $var wire 1 k# out_2d_unpacked[0][2] $end + $var wire 1 l# out_2d_unpacked[0][3] $end + $var wire 1 m# out_2d_unpacked[1][0] $end + $var wire 1 n# out_2d_unpacked[1][1] $end + $var wire 1 o# out_2d_unpacked[1][2] $end + $var wire 1 p# out_2d_unpacked[1][3] $end + $var wire 1 q# out_2d_unpacked[2][0] $end + $var wire 1 r# out_2d_unpacked[2][1] $end + $var wire 1 s# out_2d_unpacked[2][2] $end + $var wire 1 t# out_2d_unpacked[2][3] $end + $scope module data $end + $var wire 1 u# foo $end + $var wire 32 v# bar[0] [31:0] $end + $var wire 32 w# bar[1] [31:0] $end + $var wire 32 x# bar[2] [31:0] $end + $var wire 32 y# bar[3] [31:0] $end + $var wire 16 z# baz [15:0] $end + $var wire 128 {# qux [127:0] $end + $scope module sub_struct $end + $var wire 1 !$ field_a $end + $var wire 6 "$ field_b [5:0] $end + $var wire 10 #$ field_c [9:0] $end + $upscope $end + $upscope $end + $var wire 32 e# cyc [31:0] $end + $var wire 1 $% clk $end + $scope module the_struct $end + $var wire 1 u# foo $end + $var wire 32 v# bar[0] [31:0] $end + $var wire 32 w# bar[1] [31:0] $end + $var wire 32 x# bar[2] [31:0] $end + $var wire 32 y# bar[3] [31:0] $end + $var wire 16 z# baz [15:0] $end + $var wire 128 {# qux [127:0] $end + $scope module sub_struct $end + $var wire 1 !$ field_a $end + $var wire 6 "$ field_b [5:0] $end + $var wire 10 #$ field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[0] $end + $var wire 1 $$ foo $end + $var wire 32 %$ bar[0] [31:0] $end + $var wire 32 &$ bar[1] [31:0] $end + $var wire 32 '$ bar[2] [31:0] $end + $var wire 32 ($ bar[3] [31:0] $end + $var wire 16 )$ baz [15:0] $end + $var wire 128 *$ qux [127:0] $end + $scope module sub_struct $end + $var wire 1 .$ field_a $end + $var wire 6 /$ field_b [5:0] $end + $var wire 10 0$ field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[1] $end + $var wire 1 1$ foo $end + $var wire 32 2$ bar[0] [31:0] $end + $var wire 32 3$ bar[1] [31:0] $end + $var wire 32 4$ bar[2] [31:0] $end + $var wire 32 5$ bar[3] [31:0] $end + $var wire 16 6$ baz [15:0] $end + $var wire 128 7$ qux [127:0] $end + $scope module sub_struct $end + $var wire 1 ;$ field_a $end + $var wire 6 <$ field_b [5:0] $end + $var wire 10 =$ field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[2] $end + $var wire 1 >$ foo $end + $var wire 32 ?$ bar[0] [31:0] $end + $var wire 32 @$ bar[1] [31:0] $end + $var wire 32 A$ bar[2] [31:0] $end + $var wire 32 B$ bar[3] [31:0] $end + $var wire 16 C$ baz [15:0] $end + $var wire 128 D$ qux [127:0] $end + $scope module sub_struct $end + $var wire 1 H$ field_a $end + $var wire 6 I$ field_b [5:0] $end + $var wire 10 J$ field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_structs[3] $end + $var wire 1 K$ foo $end + $var wire 32 L$ bar[0] [31:0] $end + $var wire 32 M$ bar[1] [31:0] $end + $var wire 32 N$ bar[2] [31:0] $end + $var wire 32 O$ bar[3] [31:0] $end + $var wire 16 P$ baz [15:0] $end + $var wire 128 Q$ qux [127:0] $end + $scope module sub_struct $end + $var wire 1 U$ field_a $end + $var wire 6 V$ field_b [5:0] $end + $var wire 10 W$ field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[0] $end + $var wire 1 F& foo $end + $var wire 32 G& bar[0] [31:0] $end + $var wire 32 H& bar[1] [31:0] $end + $var wire 32 I& bar[2] [31:0] $end + $var wire 32 J& bar[3] [31:0] $end + $var wire 16 K& baz [15:0] $end + $var wire 128 L& qux [127:0] $end + $scope module sub_struct $end + $var wire 1 P& field_a $end + $var wire 6 Q& field_b [5:0] $end + $var wire 10 R& field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[1] $end + $var wire 1 S& foo $end + $var wire 32 T& bar[0] [31:0] $end + $var wire 32 U& bar[1] [31:0] $end + $var wire 32 V& bar[2] [31:0] $end + $var wire 32 W& bar[3] [31:0] $end + $var wire 16 X& baz [15:0] $end + $var wire 128 Y& qux [127:0] $end + $scope module sub_struct $end + $var wire 1 ]& field_a $end + $var wire 6 ^& field_b [5:0] $end + $var wire 10 _& field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_packed_structs[2] $end + $var wire 1 `& foo $end + $var wire 32 a& bar[0] [31:0] $end + $var wire 32 b& bar[1] [31:0] $end + $var wire 32 c& bar[2] [31:0] $end + $var wire 32 d& bar[3] [31:0] $end + $var wire 16 e& baz [15:0] $end + $var wire 128 f& qux [127:0] $end + $scope module sub_struct $end + $var wire 1 j& field_a $end + $var wire 6 k& field_b [5:0] $end + $var wire 10 l& field_c [9:0] $end + $upscope $end + $upscope $end + $scope module the_local_struct $end + $var wire 1 X$ abc $end + $var wire 1 Y$ def $end + $var wire 1 Z$ xyz $end + $upscope $end + $scope module const_struct $end + $var wire 1 L% abc $end + $var wire 1 M% def $end + $var wire 1 L% xyz $end + $upscope $end + $scope module the_typedefed_struct $end + $var wire 1 [$ abc $end + $var wire 1 \$ def $end + $var wire 1 ]$ xyz $end + $upscope $end + $scope module the_local_unpacked_struct $end + $var wire 1 ^$ field_a $end + $var wire 1 _$ field_b $end + $var wire 1 `$ field_c $end + $upscope $end + $scope module the_local_union $end + $scope module union_a $end + $var wire 8 a$ field_0 [7:0] $end + $upscope $end + $scope module union_b $end + $var wire 4 b$ field_1 [3:0] $end + $var wire 4 c$ field_2 [3:0] $end + $upscope $end + $scope module union_c $end + $var wire 2 d$ field_3 [1:0] $end + $var wire 6 e$ field_4 [5:0] $end + $upscope $end + $upscope $end + $var wire 32 f$ the_logic_array[0] [31:0] $end + $var wire 32 g$ the_logic_array[1] [31:0] $end + $var wire 32 h$ the_other_logic_array[0] [31:0] $end + $var wire 32 i$ the_other_logic_array[1] [31:0] $end + $var wire 16 j$ the_unpacked_array[0] [15:0] $end + $var wire 16 k$ the_unpacked_array[1] [15:0] $end + $var wire 16 l$ the_unpacked_array[2] [15:0] $end + $var wire 16 m$ the_unpacked_array[3] [15:0] $end + $var wire 16 n$ the_unpacked_array[4] [15:0] $end + $var wire 1 o$ the_2d_unpacked[0][0] $end + $var wire 1 p$ the_2d_unpacked[0][1] $end + $var wire 1 q$ the_2d_unpacked[0][2] $end + $var wire 1 r$ the_2d_unpacked[0][3] $end + $var wire 1 s$ the_2d_unpacked[1][0] $end + $var wire 1 t$ the_2d_unpacked[1][1] $end + $var wire 1 u$ the_2d_unpacked[1][2] $end + $var wire 1 v$ the_2d_unpacked[1][3] $end + $var wire 1 w$ the_2d_unpacked[2][0] $end + $var wire 1 x$ the_2d_unpacked[2][1] $end + $var wire 1 y$ the_2d_unpacked[2][2] $end + $var wire 1 z$ the_2d_unpacked[2][3] $end + $var wire 4 N% two_fours[0] [3:0] $end + $var wire 4 O% two_fours[1] [3:0] $end + $var wire 4 m& two_fours_var[0] [3:0] $end + $var wire 4 n& two_fours_var[1] [3:0] $end + $upscope $end + $upscope $end + $scope module the_intf_a $end + $var wire 1 $% clk $end + $var wire 8 {$ data[0] [7:0] $end + $var wire 8 |$ data[1] [7:0] $end + $var wire 8 }$ data[2] [7:0] $end + $var wire 8 ~$ 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+b00001101 }$ +b00001110 ~$ +b00001110000011010000110000001011 !% +b00001111 "% +b00001111000011100000110100001100 #% +1$% diff --git a/test_regress/t/t_trace_type_dupes_structs.py b/test_regress/t/t_trace_type_dupes_structs.py new file mode 100755 index 000000000..7a79ce5ef --- /dev/null +++ b/test_regress/t/t_trace_type_dupes_structs.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of either the GNU Lesser General Public License Version 3 +# or the Perl Artistic License Version 2.0. +# SPDX-FileCopyrightText: 2026 Wilson Snyder +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios("simulator_st") +test.top_filename = "t/t_trace_type_dupes.v" + +test.compile( + # artificially low trace splitting for force cross-split type function usage + verilator_flags2=["--trace", "--trace-structs", "--output-split-ctrace 10"] +) + +test.execute() + +test.vcd_identical(test.trace_filename, test.golden_filename) + +test.passes() From 6931eb4622d7ae6353fb0eb78b5a611ca2806e41 Mon Sep 17 00:00:00 2001 From: github action Date: Mon, 2 Mar 2026 20:40:40 +0000 Subject: [PATCH 2/2] Apply 'make format' --- test_regress/t/t_trace_type_dupes_structs.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/test_regress/t/t_trace_type_dupes_structs.py b/test_regress/t/t_trace_type_dupes_structs.py index 7a79ce5ef..dc9d8472f 100755 --- a/test_regress/t/t_trace_type_dupes_structs.py +++ b/test_regress/t/t_trace_type_dupes_structs.py @@ -14,8 +14,7 @@ test.top_filename = "t/t_trace_type_dupes.v" test.compile( # artificially low trace splitting for force cross-split type function usage - verilator_flags2=["--trace", "--trace-structs", "--output-split-ctrace 10"] -) + verilator_flags2=["--trace", "--trace-structs", "--output-split-ctrace 10"]) test.execute()