diff --git a/Changes b/Changes
index 9445ee23a..8abc9d626 100644
--- a/Changes
+++ b/Changes
@@ -31,6 +31,7 @@ Verilator 4.205 devel
 * Allow configure override of AR program (#2999). [ahouska]
 * In XML, show pinIndex information (#2877). [errae233]
 * Fix error on unsupported recursive functions (#2957). [Trefor Southwell]
+* Fix type parameter specialization when struct names are same (#3055). [7FM]
 
 
 Verilator 4.204 2021-06-12
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index a90403382..a09dca9e4 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -299,9 +299,13 @@ class ParamProcessor final {
         }
         return st;
     }
-    string paramValueNumber(AstNode* nodep) {
+
+    static string paramValueKey(const AstNode* nodep) {
+        if (const AstRefDType* const refp = VN_CAST_CONST(nodep, RefDType)) {
+            nodep = refp->skipRefp();
+        }
         string key = nodep->name();
-        if (AstIfaceRefDType* ifrtp = VN_CAST(nodep, IfaceRefDType)) {
+        if (const AstIfaceRefDType* const ifrtp = VN_CAST_CONST(nodep, IfaceRefDType)) {
             if (ifrtp->cellp() && ifrtp->cellp()->modp()) {
                 key = ifrtp->cellp()->modp()->name();
             } else if (ifrtp->ifacep()) {
@@ -309,11 +313,33 @@ class ParamProcessor final {
             } else {
                 nodep->v3fatalSrc("Can't parameterize interface without module name");
             }
-        } else if (AstBasicDType* bdtp = VN_CAST(nodep, BasicDType)) {
-            if (bdtp->isRanged()) {
-                key += "[" + cvtToStr(bdtp->left()) + ":" + cvtToStr(bdtp->right()) + "]";
+        } else if (const AstNodeUOrStructDType* const dtypep
+                   = VN_CAST_CONST(nodep, NodeUOrStructDType)) {
+            key += " ";
+            key += dtypep->verilogKwd();
+            key += " {";
+            for (const AstNode* memberp = dtypep->membersp(); memberp;
+                 memberp = memberp->nextp()) {
+                key += paramValueKey(memberp);
+                key += ";";
+            }
+            key += "}";
+        } else if (const AstMemberDType* const dtypep = VN_CAST_CONST(nodep, MemberDType)) {
+            key += " ";
+            key += paramValueKey(dtypep->subDTypep());
+        } else if (const AstBasicDType* const dtypep = VN_CAST_CONST(nodep, BasicDType)) {
+            if (dtypep->isRanged()) {
+                key += "[" + cvtToStr(dtypep->left()) + ":" + cvtToStr(dtypep->right()) + "]";
             }
         }
+        return key;
+    }
+
+    string paramValueNumber(AstNode* nodep) {
+        // TODO: This parameter value number lookup via a constructed key string is not
+        //       particularly robust for type parameters. We should really have a type
+        //       equivalence predicate function.
+        const string key = paramValueKey(nodep);
         V3Hash hash = V3Hasher::uncachedHash(nodep);
         // Force hash collisions -- for testing only
         if (VL_UNLIKELY(v3Global.opt.debugCollision())) hash = V3Hash();
diff --git a/test_regress/t/t_param_type4.pl b/test_regress/t/t_param_type4.pl
new file mode 100755
index 000000000..b46d46042
--- /dev/null
+++ b/test_regress/t/t_param_type4.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_param_type4.v b/test_regress/t/t_param_type4.v
new file mode 100644
index 000000000..4fd9604bd
--- /dev/null
+++ b/test_regress/t/t_param_type4.v
@@ -0,0 +1,65 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2021 by Geza Lore.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   wire  o0, o1;
+
+   sub #(1) a(.i(1'b0), .o(o0));
+   sub #(2) b(.i(1'b0), .o(o1));
+
+   always @(posedge clk) begin
+      if (o0 != 1'b0) begin
+         $write("Bad o0\n");
+         $stop;
+      end
+      if (o1 != 1'b1) begin
+         $write("Bad o1\n");
+         $stop;
+      end
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule
+
+module sub
+  #(
+    parameter int W
+    )
+   (
+    input wire  i,
+    output wire o
+    );
+
+   typedef struct packed {
+      logic [W-1:0] a;
+   } s;
+
+   sub2 #(s) c(.i(i), .o(o));
+
+endmodule
+
+module sub2
+  # (
+     parameter type T = logic
+     )
+   (
+    input wire  i,
+    output wire o
+    );
+
+   if ($bits(T) % 2 == 1) begin
+      assign o =  i;
+   end else begin
+      assign o =  ~i;
+   end
+
+endmodule
diff --git a/test_regress/t/t_param_type4_collision.pl b/test_regress/t/t_param_type4_collision.pl
new file mode 100755
index 000000000..c2b4251c7
--- /dev/null
+++ b/test_regress/t/t_param_type4_collision.pl
@@ -0,0 +1,24 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+top_filename("t/t_param_type4.v");
+
+compile(
+    verilator_flags2 => ["--debug-collision"]
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;