From ace35b3e81657b12b320957b8d88da601cf8cb75 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 23 Apr 2020 08:04:15 -0400 Subject: [PATCH] Tests: Add -G test. --- test_regress/t/t_flag_parameter_hier.pl | 33 ++++++++++ test_regress/t/t_flag_parameter_hier.v | 83 +++++++++++++++++++++++++ 2 files changed, 116 insertions(+) create mode 100755 test_regress/t/t_flag_parameter_hier.pl create mode 100644 test_regress/t/t_flag_parameter_hier.v diff --git a/test_regress/t/t_flag_parameter_hier.pl b/test_regress/t/t_flag_parameter_hier.pl new file mode 100755 index 000000000..0bf458d34 --- /dev/null +++ b/test_regress/t/t_flag_parameter_hier.pl @@ -0,0 +1,33 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2008 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(simulator => 1); + +compile( + # For Verilator, all PARAMs at all levels are overwridden + # Error if parameter not found + #verilator_flags2 => ['-GPARAM=10 -Gtop.t.x.HIER=20'], # HIER would error + verilator_flags2 => ['-GPARAM=10'], + # For NC, always implies a hierarchy, only HIER will be set + # Warns if sets nothing + nc_flags2 => ['+defparam+PARAM=10 +defparam+top.t.x.HIER=20'], + # For VCS, all PARAMs at all levels are overridden. Hierarchy not allowed. + # Informational on all overrides + vcs_flags2 => ['-pvalue+PARAM=10 -px.HIER=20'], + # For icarus -P without hierarchy does nothing, only can ref into top + iv_flags2 => ['-PPARAM=10', '-Ptop.HIER=30', '-Ptop.t.x.HIER=20'], + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_flag_parameter_hier.v b/test_regress/t/t_flag_parameter_hier.v new file mode 100644 index 000000000..e5ee4a84a --- /dev/null +++ b/test_regress/t/t_flag_parameter_hier.v @@ -0,0 +1,83 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2016 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +`define check(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: %m: Wrong parameter value\n", `__FILE__,`__LINE__); $stop; end while(0); + +module t (/*AUTOARG*/ + // Inputs + clk + ); + input clk; + + u u (); + tx x (); + + parameter PARAM = 0; + parameter HIER = 0; + initial begin + $display("%m PARAM=%0d HIER=%0d", PARAM, HIER); +`ifdef IVERILOG + `check(PARAM, 0); +`elsif NC + `check(PARAM, 0); +`elsif VCS + `check(PARAM, 10); +`else + `check(PARAM, 10); +`endif + + `check(HIER, 0); + end + always @ (posedge clk) begin + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule + +module u; + ux x(); +endmodule + +module ux; + parameter PARAM = 0; + parameter HIER = 0; + initial begin + $display("%m PARAM=%0d HIER=%0d", PARAM, HIER); +`ifdef IVERILOG + `check(PARAM, 0); +`elsif NC + `check(PARAM, 0); +`elsif VCS + `check(PARAM, 10); +`else + `check(PARAM, 0); +`endif + `check(HIER, 0); + end +endmodule + +module tx; + parameter PARAM = 0; + parameter HIER = 0; + initial begin + $display("%m PARAM=%0d HIER=%0d", PARAM, HIER); +`ifdef IVERILOG + `check(PARAM, 0); +`elsif NC + `check(PARAM, 10); +`elsif VCS + `check(PARAM, 10); +`else + `check(PARAM, 0); +`endif +`ifdef NC + `check(HIER, 20); +`else + `check(HIER, 0); +`endif + end +endmodule