From ac21d25d43b780f1ecd54c1abf6435b91b5d5033 Mon Sep 17 00:00:00 2001 From: Ryszard Rozak Date: Tue, 26 Aug 2025 16:39:24 +0200 Subject: [PATCH] Support simple disable within task (#6334) --- src/V3LinkJump.cpp | 6 +++- test_regress/t/t_disable_inside.v | 4 +-- test_regress/t/t_disable_task_simple.py | 18 ++++++++++ test_regress/t/t_disable_task_simple.v | 45 +++++++++++++++++++++++++ 4 files changed, 69 insertions(+), 4 deletions(-) create mode 100755 test_regress/t/t_disable_task_simple.py create mode 100644 test_regress/t/t_disable_task_simple.v diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp index fe7e640c8..39244c091 100644 --- a/src/V3LinkJump.cpp +++ b/src/V3LinkJump.cpp @@ -187,7 +187,11 @@ class LinkJumpVisitor final : public VNVisitor { FileLine* const fl = nodep->fileline(); const std::string targetName = nodep->targetp()->name(); if (m_ftaskp) { - nodep->v3warn(E_UNSUPPORTED, "Unsupported: disabling fork from task / function"); + if (!m_ftaskp->exists([targetp = nodep->targetp()](const AstNodeBlock* blockp) + -> bool { return blockp == targetp; })) { + // Disabling a fork, which is within the same task, is not a problem + nodep->v3warn(E_UNSUPPORTED, "Unsupported: disabling fork from task / function"); + } } AstPackage* const topPkgp = v3Global.rootp()->dollarUnitPkgAddp(); AstClass* const processClassp diff --git a/test_regress/t/t_disable_inside.v b/test_regress/t/t_disable_inside.v index 04b74b3bf..5e4e428e3 100644 --- a/test_regress/t/t_disable_inside.v +++ b/test_regress/t/t_disable_inside.v @@ -10,13 +10,11 @@ module t ( /*AUTOARG*/); fork : fork_blk begin x = 1; - #2; + disable fork_blk; x = 2; end join_none #1; - disable fork_blk; - #2; if (x != 1) $stop; $write("*-* All Finished *-*\n"); $finish; diff --git a/test_regress/t/t_disable_task_simple.py b/test_regress/t/t_disable_task_simple.py new file mode 100755 index 000000000..3476171ff --- /dev/null +++ b/test_regress/t/t_disable_task_simple.py @@ -0,0 +1,18 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2024 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('simulator') + +test.compile(timing_loop=True, verilator_flags2=["--timing"]) + +test.execute() + +test.passes() diff --git a/test_regress/t/t_disable_task_simple.v b/test_regress/t/t_disable_task_simple.v new file mode 100644 index 000000000..cde398fbb --- /dev/null +++ b/test_regress/t/t_disable_task_simple.v @@ -0,0 +1,45 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +class Cls; + int x = 0; + int y = 0; + + task disable_outside_fork; + fork : fork_blk + begin + x = 1; + #2; + x = 2; + end + join_none + #1; + disable fork_blk; + endtask + + task disable_inside_fork; + fork : fork_blk + begin + y = 1; + disable fork_blk; + y = 2; + end + join_none + endtask +endclass + +module t ( /*AUTOARG*/); + initial begin + Cls c = new; + c.disable_outside_fork(); + #2; + if (c.x != 1) $stop; + c.disable_inside_fork(); + if (c.y != 1) $stop; + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule