From a364704e3acab8a55ea0f96a525f1ce2a2fe399a Mon Sep 17 00:00:00 2001 From: Jakub Wasilewski <127893851+wasilewskiJ@users.noreply.github.com> Date: Fri, 5 Sep 2025 19:16:30 +0200 Subject: [PATCH] Improve `covergroup with function sample` handling (#6387) --- docs/CONTRIBUTORS | 1 + src/verilog.y | 78 ++++++++++------ .../t/t_covergroup_coverpoints_unsup.out | 10 +- .../t/t_covergroup_in_class_with_sample.py | 16 ++++ .../t/t_covergroup_in_class_with_sample.v | 15 +++ test_regress/t/t_covergroup_unsup.out | 91 +++++++++---------- .../t/t_covergroup_with_function_foo_bad.out | 5 + .../t/t_covergroup_with_function_foo_bad.py | 16 ++++ .../t/t_covergroup_with_function_foo_bad.v | 12 +++ .../t/t_covergroup_with_sample_args.py | 16 ++++ .../t/t_covergroup_with_sample_args.v | 17 ++++ .../t_covergroup_with_sample_args_default.py | 16 ++++ .../t/t_covergroup_with_sample_args_default.v | 18 ++++ ...overgroup_with_sample_args_too_few_bad.out | 6 ++ ...covergroup_with_sample_args_too_few_bad.py | 16 ++++ ..._covergroup_with_sample_args_too_few_bad.v | 18 ++++ ...vergroup_with_sample_args_too_many_bad.out | 6 ++ ...overgroup_with_sample_args_too_many_bad.py | 16 ++++ ...covergroup_with_sample_args_too_many_bad.v | 17 ++++ .../t/t_covergroup_with_sample_namedargs.py | 16 ++++ .../t/t_covergroup_with_sample_namedargs.v | 15 +++ .../t/t_covergroup_with_sample_zeroargs.py | 16 ++++ .../t/t_covergroup_with_sample_zeroargs.v | 15 +++ 23 files changed, 372 insertions(+), 80 deletions(-) create mode 100755 test_regress/t/t_covergroup_in_class_with_sample.py create mode 100644 test_regress/t/t_covergroup_in_class_with_sample.v create mode 100644 test_regress/t/t_covergroup_with_function_foo_bad.out create mode 100755 test_regress/t/t_covergroup_with_function_foo_bad.py create mode 100644 test_regress/t/t_covergroup_with_function_foo_bad.v create mode 100755 test_regress/t/t_covergroup_with_sample_args.py create mode 100644 test_regress/t/t_covergroup_with_sample_args.v create mode 100755 test_regress/t/t_covergroup_with_sample_args_default.py create mode 100644 test_regress/t/t_covergroup_with_sample_args_default.v create mode 100644 test_regress/t/t_covergroup_with_sample_args_too_few_bad.out create mode 100755 test_regress/t/t_covergroup_with_sample_args_too_few_bad.py create mode 100644 test_regress/t/t_covergroup_with_sample_args_too_few_bad.v create mode 100644 test_regress/t/t_covergroup_with_sample_args_too_many_bad.out create mode 100755 test_regress/t/t_covergroup_with_sample_args_too_many_bad.py create mode 100644 test_regress/t/t_covergroup_with_sample_args_too_many_bad.v create mode 100755 test_regress/t/t_covergroup_with_sample_namedargs.py create mode 100644 test_regress/t/t_covergroup_with_sample_namedargs.v create mode 100755 test_regress/t/t_covergroup_with_sample_zeroargs.py create mode 100644 test_regress/t/t_covergroup_with_sample_zeroargs.v diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS index 0471a2f88..1a629b4c3 100644 --- a/docs/CONTRIBUTORS +++ b/docs/CONTRIBUTORS @@ -94,6 +94,7 @@ Iru Cai Ivan Vnučec Iztok Jeras Jake Merdich +Jakub Wasilewski James Bailey James Hanlon James Hutchinson diff --git a/src/verilog.y b/src/verilog.y index f2f11e294..67d12719c 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -147,19 +147,28 @@ public: nodep->trace(GRAMMARP->allTracingOn(fileline)); return nodep; } - void createCoverGroupMethods(AstClass* nodep) { + void createCoverGroupMethods(AstClass* nodep, AstNode* sampleArgs) { // Hidden static to take unspecified reference argument results AstVar* const defaultVarp = new AstVar{nodep->fileline(), VVarType::MEMBER, "__Vint", nodep->findIntDType()}; defaultVarp->lifetime(VLifetime::STATIC); nodep->addStmtsp(defaultVarp); - // IEEE: function void sample(), void start(), void stop() - for (const string& name : {"sample"s, "start"s, "stop"s}) { + + // IEEE: function void sample() + AstFunc* const funcp = new AstFunc{nodep->fileline(), "sample", nullptr, nullptr}; + funcp->addStmtsp(sampleArgs); + funcp->classMethod(true); + funcp->dtypep(funcp->findVoidDType()); + nodep->addMembersp(funcp); + + // IEEE: function void start(), void stop() + for (const string& name : {"start"s, "stop"s}) { AstFunc* const funcp = new AstFunc{nodep->fileline(), name, nullptr, nullptr}; funcp->classMethod(true); funcp->dtypep(funcp->findVoidDType()); nodep->addMembersp(funcp); } + // IEEE: static function real get_coverage(optional ref int, optional ref int) // IEEE: function real get_inst_coverage(optional ref int, optional ref int) for (const string& name : {"get_coverage"s, "get_inst_coverage"s}) { @@ -6944,36 +6953,43 @@ boolean_abbrev: // ==IEEE: boolean_abbrev // Covergroup covergroup_declaration: // ==IEEE: covergroup_declaration - covergroup_declarationFront coverage_eventE ';' + yCOVERGROUP idAny cgPortListE coverage_eventE ';' /*cont*/ coverage_spec_or_optionListE - /*cont*/ yENDGROUP endLabelE - { $$ = $1; - GRAMMARP->endLabel($6, $1, $6); } - | covergroup_declarationFront '(' tf_port_listE ')' - /*cont*/ coverage_eventE ';' coverage_spec_or_optionListE - /*cont*/ yENDGROUP endLabelE - { AstFunc* const newp = new AstFunc{$1, "new", nullptr, nullptr}; + /*cont*/ yENDGROUP endLabelE + { AstClass *cgClassp = new AstClass{$2, *$2, PARSEP->libname()}; + AstFunc* const newp = new AstFunc{$1, "new", nullptr, nullptr}; newp->classMethod(true); newp->isConstructor(true); - newp->dtypep($1->dtypep()); + newp->dtypep(cgClassp->dtypep()); newp->addStmtsp($3); - $1->addMembersp(newp); - $$ = $1; - GRAMMARP->endLabel($9, $1, $9); } - ; + cgClassp->addMembersp(newp); + GRAMMARP->createCoverGroupMethods(cgClassp, $4); -covergroup_extendsE: // IEEE: Part of covergroup_declaration - /* empty */ { $$ = nullptr; } - | yEXTENDS { $$ = $1; } - ; - -covergroup_declarationFront: // IEEE: part of covergroup_declaration - yCOVERGROUP covergroup_extendsE idAny - { + $$ = cgClassp; + GRAMMARP->endLabel($8, $$, $8); BBCOVERIGN($1, "Ignoring unsupported: covergroup"); - $$ = new AstClass{$3, *$3, PARSEP->libname()}; - GRAMMARP->createCoverGroupMethods($$); } - ; + } + | yCOVERGROUP yEXTENDS idAny ';' + /*cont*/ coverage_spec_or_optionListE + /*cont*/ yENDGROUP endLabelE + { AstClass *cgClassp = new AstClass{$3, *$3, PARSEP->libname()}; + AstFunc* const newp = new AstFunc{$1, "new", nullptr, nullptr}; + newp->classMethod(true); + newp->isConstructor(true); + newp->dtypep(cgClassp->dtypep()); + cgClassp->addMembersp(newp); + GRAMMARP->createCoverGroupMethods(cgClassp, nullptr); + + $$ = cgClassp; + GRAMMARP->endLabel($7, $$, $7); + BBCOVERIGN($1, "Ignoring unsupported: covergroup"); + } + ; + +cgPortListE: + /*empty*/ { $$ = nullptr; } + | '(' tf_port_listE ')' { $$ = $2; } + ; cgexpr: // IEEE-2012: covergroup_expression, before that just expression expr { $$ = $1; } @@ -7224,7 +7240,13 @@ coverage_eventE: // IEEE: [ coverage_event ] | clocking_event { $$ = nullptr; BBCOVERIGN($1, "Ignoring unsupported: coverage clocking event"); } | yWITH__ETC yFUNCTION idAny/*"sample"*/ '(' tf_port_listE ')' - { $$ = nullptr; BBCOVERIGN($1, "Ignoring unsupported: coverage 'with' 'function'"); } + { if (*$3 != "sample") { + $3->v3error("Coverage sampling function must be named 'sample'"); + $$ = nullptr; + } else { + $$ = $5; + } + } | yP_ATAT '(' block_event_expression ')' { $$ = nullptr; BBCOVERIGN($1, "Ignoring unsupported: coverage '@@' events"); } ; diff --git a/test_regress/t/t_covergroup_coverpoints_unsup.out b/test_regress/t/t_covergroup_coverpoints_unsup.out index 7e822aa5a..e6478326e 100644 --- a/test_regress/t/t_covergroup_coverpoints_unsup.out +++ b/test_regress/t/t_covergroup_coverpoints_unsup.out @@ -1,11 +1,8 @@ -%Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:21:5: Ignoring unsupported: covergroup - 21 | covergroup cg @(posedge clk); - | ^~~~~~~~~~ - ... For warning description see https://verilator.org/warn/COVERIGN?v=latest - ... Use "/* verilator lint_off COVERIGN */" and lint_on around source to disable this message. %Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:21:19: Ignoring unsupported: coverage clocking event 21 | covergroup cg @(posedge clk); | ^ + ... For warning description see https://verilator.org/warn/COVERIGN?v=latest + ... Use "/* verilator lint_off COVERIGN */" and lint_on around source to disable this message. %Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:22:9: Ignoring unsupported: coverpoint 22 | coverpoint a; | ^~~~~~~~~~ @@ -15,6 +12,9 @@ %Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:23:9: Ignoring unsupported: coverpoint 23 | coverpoint b { | ^~~~~~~~~~ +%Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:21:5: Ignoring unsupported: covergroup + 21 | covergroup cg @(posedge clk); + | ^~~~~~~~~~ %Error: t/t_covergroup_coverpoints_unsup.v:35:48: Member 'a' not found in class 'cg' : ... note: In instance 't' 35 | $display("coverage a = %f", the_cg.a.get_inst_coverage()); diff --git a/test_regress/t/t_covergroup_in_class_with_sample.py b/test_regress/t/t_covergroup_in_class_with_sample.py new file mode 100755 index 000000000..319c0ff4a --- /dev/null +++ b/test_regress/t/t_covergroup_in_class_with_sample.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt') + +test.compile() + +test.passes() diff --git a/test_regress/t/t_covergroup_in_class_with_sample.v b/test_regress/t/t_covergroup_in_class_with_sample.v new file mode 100644 index 000000000..0666f3457 --- /dev/null +++ b/test_regress/t/t_covergroup_in_class_with_sample.v @@ -0,0 +1,15 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +class C; + covergroup embedded(int x) with function sample (int a, bit b); + endgroup + function new(); + embedded = new(1); + embedded.sample(2, 1'b0); + endfunction +endclass diff --git a/test_regress/t/t_covergroup_unsup.out b/test_regress/t/t_covergroup_unsup.out index bd3713710..fedb77178 100644 --- a/test_regress/t/t_covergroup_unsup.out +++ b/test_regress/t/t_covergroup_unsup.out @@ -3,9 +3,6 @@ | ^~~~~~~~~~ ... For warning description see https://verilator.org/warn/COVERIGN?v=latest ... Use "/* verilator lint_off COVERIGN */" and lint_on around source to disable this message. -%Warning-COVERIGN: t/t_covergroup_unsup.v:28:4: Ignoring unsupported: covergroup - 28 | covergroup cg_opt; - | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:29:7: Ignoring unsupported: coverage option 29 | type_option.weight = 1; | ^~~~~~~~~~~ @@ -54,41 +51,38 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:44:7: Ignoring unsupported: coverage option 44 | option.get_inst_coverage = 1; | ^~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:47:4: Ignoring unsupported: covergroup - 47 | covergroup cg_clockingevent() @(posedge clk); +%Warning-COVERIGN: t/t_covergroup_unsup.v:28:4: Ignoring unsupported: covergroup + 28 | covergroup cg_opt; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:47:34: Ignoring unsupported: coverage clocking event 47 | covergroup cg_clockingevent() @(posedge clk); | ^ +%Warning-COVERIGN: t/t_covergroup_unsup.v:47:4: Ignoring unsupported: covergroup + 47 | covergroup cg_clockingevent() @(posedge clk); + | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:49:4: Ignoring unsupported: covergroup 49 | covergroup cg_withfunction() with function sample (a); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:49:33: Ignoring unsupported: coverage 'with' 'function' - 49 | covergroup cg_withfunction() with function sample (a); - | ^~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:51:4: Ignoring unsupported: covergroup - 51 | covergroup cg_atat() @@ (begin funca or end funcb); - | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:51:25: Ignoring unsupported: coverage '@@' events 51 | covergroup cg_atat() @@ (begin funca or end funcb); | ^~ +%Warning-COVERIGN: t/t_covergroup_unsup.v:51:4: Ignoring unsupported: covergroup + 51 | covergroup cg_atat() @@ (begin funca or end funcb); + | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:53:4: Ignoring unsupported: covergroup 53 | covergroup cg_bracket; | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:56:4: Ignoring unsupported: covergroup - 56 | covergroup cg_bracket2; - | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:57:9: Ignoring unsupported: coverage option 57 | { option.name = "option"; } | ^~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:59:4: Ignoring unsupported: covergroup - 59 | covergroup cg_cp; +%Warning-COVERIGN: t/t_covergroup_unsup.v:56:4: Ignoring unsupported: covergroup + 56 | covergroup cg_bracket2; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:60:7: Ignoring unsupported: coverpoint 60 | coverpoint a; | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:62:4: Ignoring unsupported: covergroup - 62 | covergroup cg_cp_iff; +%Warning-COVERIGN: t/t_covergroup_unsup.v:59:4: Ignoring unsupported: covergroup + 59 | covergroup cg_cp; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:63:20: Ignoring unsupported: cover 'iff' 63 | coverpoint a iff (b); @@ -96,8 +90,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:63:7: Ignoring unsupported: coverpoint 63 | coverpoint a iff (b); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:65:4: Ignoring unsupported: covergroup - 65 | covergroup cg_id_cp_iff; +%Warning-COVERIGN: t/t_covergroup_unsup.v:62:4: Ignoring unsupported: covergroup + 62 | covergroup cg_cp_iff; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:66:24: Ignoring unsupported: cover 'iff' 66 | id: coverpoint a iff (b); @@ -105,8 +99,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:66:11: Ignoring unsupported: coverpoint 66 | id: coverpoint a iff (b); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:68:4: Ignoring unsupported: covergroup - 68 | covergroup cg_id_cp_id1; +%Warning-COVERIGN: t/t_covergroup_unsup.v:65:4: Ignoring unsupported: covergroup + 65 | covergroup cg_id_cp_iff; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:69:28: Ignoring unsupported: cover 'iff' 69 | int id: coverpoint a iff (b); @@ -114,8 +108,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:69:15: Ignoring unsupported: coverpoint 69 | int id: coverpoint a iff (b); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:71:4: Ignoring unsupported: covergroup - 71 | covergroup cg_id_cp_id2; +%Warning-COVERIGN: t/t_covergroup_unsup.v:68:4: Ignoring unsupported: covergroup + 68 | covergroup cg_id_cp_id1; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:72:32: Ignoring unsupported: cover 'iff' 72 | var int id: coverpoint a iff (b); @@ -123,8 +117,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:72:19: Ignoring unsupported: coverpoint 72 | var int id: coverpoint a iff (b); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:74:4: Ignoring unsupported: covergroup - 74 | covergroup cg_id_cp_id3; +%Warning-COVERIGN: t/t_covergroup_unsup.v:71:4: Ignoring unsupported: covergroup + 71 | covergroup cg_id_cp_id2; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:75:34: Ignoring unsupported: cover 'iff' 75 | var [3:0] id: coverpoint a iff (b); @@ -132,8 +126,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:75:21: Ignoring unsupported: coverpoint 75 | var [3:0] id: coverpoint a iff (b); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:77:4: Ignoring unsupported: covergroup - 77 | covergroup cg_id_cp_id4; +%Warning-COVERIGN: t/t_covergroup_unsup.v:74:4: Ignoring unsupported: covergroup + 74 | covergroup cg_id_cp_id3; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:78:30: Ignoring unsupported: cover 'iff' 78 | [3:0] id: coverpoint a iff (b); @@ -141,8 +135,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:78:17: Ignoring unsupported: coverpoint 78 | [3:0] id: coverpoint a iff (b); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:80:4: Ignoring unsupported: covergroup - 80 | covergroup cg_id_cp_id5; +%Warning-COVERIGN: t/t_covergroup_unsup.v:77:4: Ignoring unsupported: covergroup + 77 | covergroup cg_id_cp_id4; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:81:31: Ignoring unsupported: cover 'iff' 81 | signed id: coverpoint a iff (b); @@ -150,8 +144,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:81:18: Ignoring unsupported: coverpoint 81 | signed id: coverpoint a iff (b); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:84:4: Ignoring unsupported: covergroup - 84 | covergroup cg_cross; +%Warning-COVERIGN: t/t_covergroup_unsup.v:80:4: Ignoring unsupported: covergroup + 80 | covergroup cg_id_cp_id5; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:85:18: Ignoring unsupported: cover 'iff' 85 | cross a, b iff (!rst); @@ -159,8 +153,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:85:7: Ignoring unsupported: cover cross 85 | cross a, b iff (!rst); | ^~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:87:4: Ignoring unsupported: covergroup - 87 | covergroup cg_cross2; +%Warning-COVERIGN: t/t_covergroup_unsup.v:84:4: Ignoring unsupported: covergroup + 84 | covergroup cg_cross; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:88:18: Ignoring unsupported: cover 'iff' 88 | cross a, b iff (!rst) {} @@ -168,8 +162,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:88:7: Ignoring unsupported: cover cross 88 | cross a, b iff (!rst) {} | ^~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:90:4: Ignoring unsupported: covergroup - 90 | covergroup cg_cross3; +%Warning-COVERIGN: t/t_covergroup_unsup.v:87:4: Ignoring unsupported: covergroup + 87 | covergroup cg_cross2; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:91:20: Ignoring unsupported: coverage option 91 | cross a, b { option.comment = "cross"; option.weight = 12; } @@ -180,8 +174,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:91:7: Ignoring unsupported: cover cross 91 | cross a, b { option.comment = "cross"; option.weight = 12; } | ^~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:93:4: Ignoring unsupported: covergroup - 93 | covergroup cg_cross4; +%Warning-COVERIGN: t/t_covergroup_unsup.v:90:4: Ignoring unsupported: covergroup + 90 | covergroup cg_cross3; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:95:24: Ignoring unsupported: coverage cross 'function' declaration 95 | function void crossfunc; endfunction @@ -195,8 +189,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:94:7: Ignoring unsupported: cover cross 94 | cross a, b { | ^~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:99:4: Ignoring unsupported: covergroup - 99 | covergroup cg_cross_id; +%Warning-COVERIGN: t/t_covergroup_unsup.v:93:4: Ignoring unsupported: covergroup + 93 | covergroup cg_cross4; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:100:28: Ignoring unsupported: cover 'iff' 100 | my_cg_id: cross a, b iff (!rst); @@ -204,8 +198,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:100:17: Ignoring unsupported: cover cross 100 | my_cg_id: cross a, b iff (!rst); | ^~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:103:4: Ignoring unsupported: covergroup - 103 | covergroup cg_binsoroptions_bk1; +%Warning-COVERIGN: t/t_covergroup_unsup.v:99:4: Ignoring unsupported: covergroup + 99 | covergroup cg_cross_id; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:105:17: Ignoring unsupported: cover bin specification 105 | { bins ba = {a}; } @@ -297,8 +291,8 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:131:19: Ignoring unsupported: cover bin trans list 131 | { bins bts2 = ( 3 [=5:6] ) ; } | ^ -%Warning-COVERIGN: t/t_covergroup_unsup.v:135:4: Ignoring unsupported: covergroup - 135 | covergroup cg_cross_bins; +%Warning-COVERIGN: t/t_covergroup_unsup.v:103:4: Ignoring unsupported: covergroup + 103 | covergroup cg_binsoroptions_bk1; | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:137:23: Ignoring unsupported: coverage select expression 'binsof' 137 | bins bin_a = binsof(a); @@ -384,12 +378,12 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:136:7: Ignoring unsupported: cover cross 136 | cross a, b { | ^~~~~ +%Warning-COVERIGN: t/t_covergroup_unsup.v:135:4: Ignoring unsupported: covergroup + 135 | covergroup cg_cross_bins; + | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:154:4: Ignoring unsupported: covergroup 154 | covergroup cgArgs(int cg_lim); | ^~~~~~~~~~ -%Warning-COVERIGN: t/t_covergroup_unsup.v:161:7: Ignoring unsupported: covergroup - 161 | covergroup cov1 @m_z; - | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:161:23: Ignoring unsupported: coverage clocking event 161 | covergroup cov1 @m_z; | ^ @@ -399,6 +393,9 @@ %Warning-COVERIGN: t/t_covergroup_unsup.v:163:10: Ignoring unsupported: coverpoint 163 | coverpoint m_y; | ^~~~~~~~~~ +%Warning-COVERIGN: t/t_covergroup_unsup.v:161:7: Ignoring unsupported: covergroup + 161 | covergroup cov1 @m_z; + | ^~~~~~~~~~ %Warning-COVERIGN: t/t_covergroup_unsup.v:171:7: Ignoring unsupported: covergroup 171 | covergroup extends cg_empty; | ^~~~~~~~~~ diff --git a/test_regress/t/t_covergroup_with_function_foo_bad.out b/test_regress/t/t_covergroup_with_function_foo_bad.out new file mode 100644 index 000000000..be309ea15 --- /dev/null +++ b/test_regress/t/t_covergroup_with_function_foo_bad.out @@ -0,0 +1,5 @@ +%Error: t/t_covergroup_with_function_foo_bad.v:9:35: Coverage sampling function must be named 'sample' + 9 | covergroup cg_bad with function foo(int x); + | ^~~ + ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance. +%Error: Exiting due to diff --git a/test_regress/t/t_covergroup_with_function_foo_bad.py b/test_regress/t/t_covergroup_with_function_foo_bad.py new file mode 100755 index 000000000..dff5516bf --- /dev/null +++ b/test_regress/t/t_covergroup_with_function_foo_bad.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('simulator') + +test.compile(fails=True, expect_filename=test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_covergroup_with_function_foo_bad.v b/test_regress/t/t_covergroup_with_function_foo_bad.v new file mode 100644 index 000000000..c203e271e --- /dev/null +++ b/test_regress/t/t_covergroup_with_function_foo_bad.v @@ -0,0 +1,12 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +module t; + covergroup cg_bad with function foo(int x); + endgroup + cg_bad cov = new(); +endmodule diff --git a/test_regress/t/t_covergroup_with_sample_args.py b/test_regress/t/t_covergroup_with_sample_args.py new file mode 100755 index 000000000..319c0ff4a --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt') + +test.compile() + +test.passes() diff --git a/test_regress/t/t_covergroup_with_sample_args.v b/test_regress/t/t_covergroup_with_sample_args.v new file mode 100644 index 000000000..4f45cbb57 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args.v @@ -0,0 +1,17 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +module t; + covergroup cg_with_sample(int init_val) with function sample (int addr, bit is_read); + endgroup + + cg_with_sample cov1 = new(42); + + function void run(); + cov1.sample(16, 1'b1); + endfunction +endmodule diff --git a/test_regress/t/t_covergroup_with_sample_args_default.py b/test_regress/t/t_covergroup_with_sample_args_default.py new file mode 100755 index 000000000..319c0ff4a --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_default.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt') + +test.compile() + +test.passes() diff --git a/test_regress/t/t_covergroup_with_sample_args_default.v b/test_regress/t/t_covergroup_with_sample_args_default.v new file mode 100644 index 000000000..878498a53 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_default.v @@ -0,0 +1,18 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +module t; + covergroup cg_with_sample(int init) with function sample (int addr, bit is_read = 1'b0); + endgroup + + cg_with_sample cov1 = new(7); + + function void run(); + cov1.sample(5); + cov1.sample(6, 1'b1); + endfunction +endmodule diff --git a/test_regress/t/t_covergroup_with_sample_args_too_few_bad.out b/test_regress/t/t_covergroup_with_sample_args_too_few_bad.out new file mode 100644 index 000000000..156582a69 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_too_few_bad.out @@ -0,0 +1,6 @@ +%Error: t/t_covergroup_with_sample_args_too_few_bad.v:16:10: Missing argument on non-defaulted argument 'is_read' in function call to FUNC 'sample' + : ... note: In instance 't' + 16 | cov1.sample(1); + | ^~~~~~ + ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance. +%Error: Exiting due to diff --git a/test_regress/t/t_covergroup_with_sample_args_too_few_bad.py b/test_regress/t/t_covergroup_with_sample_args_too_few_bad.py new file mode 100755 index 000000000..dff5516bf --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_too_few_bad.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('simulator') + +test.compile(fails=True, expect_filename=test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_covergroup_with_sample_args_too_few_bad.v b/test_regress/t/t_covergroup_with_sample_args_too_few_bad.v new file mode 100644 index 000000000..bdee61669 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_too_few_bad.v @@ -0,0 +1,18 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +module t; + covergroup cg_with_sample(int init) with function sample (int addr, bit is_read); + endgroup + + cg_with_sample cov1 = new(0); + + function void run(); + // Too few arguments (1 instead of 2) + cov1.sample(1); + endfunction +endmodule diff --git a/test_regress/t/t_covergroup_with_sample_args_too_many_bad.out b/test_regress/t/t_covergroup_with_sample_args_too_many_bad.out new file mode 100644 index 000000000..a8718cb93 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_too_many_bad.out @@ -0,0 +1,6 @@ +%Error: t/t_covergroup_with_sample_args_too_many_bad.v:15:26: Too many arguments in function call to FUNC 'sample' + : ... note: In instance 't' + 15 | cov1.sample(5, 1'b0, 42); + | ^~ + ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance. +%Error: Exiting due to diff --git a/test_regress/t/t_covergroup_with_sample_args_too_many_bad.py b/test_regress/t/t_covergroup_with_sample_args_too_many_bad.py new file mode 100755 index 000000000..dff5516bf --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_too_many_bad.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('simulator') + +test.compile(fails=True, expect_filename=test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_covergroup_with_sample_args_too_many_bad.v b/test_regress/t/t_covergroup_with_sample_args_too_many_bad.v new file mode 100644 index 000000000..60ba2dc26 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_args_too_many_bad.v @@ -0,0 +1,17 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +module t; + covergroup cg_with_sample(int init) with function sample (int addr, bit is_read = 1'b0); + endgroup + + cg_with_sample cov1 = new(7); + + function void run(); + cov1.sample(5, 1'b0, 42); // Too many arguments + endfunction +endmodule diff --git a/test_regress/t/t_covergroup_with_sample_namedargs.py b/test_regress/t/t_covergroup_with_sample_namedargs.py new file mode 100755 index 000000000..319c0ff4a --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_namedargs.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt') + +test.compile() + +test.passes() diff --git a/test_regress/t/t_covergroup_with_sample_namedargs.v b/test_regress/t/t_covergroup_with_sample_namedargs.v new file mode 100644 index 000000000..d8daa5437 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_namedargs.v @@ -0,0 +1,15 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +module t; + covergroup cgN with function sample (int addr, bit is_read); + endgroup + cgN cov = new(); + function void run(); + cov.sample(.addr(11), .is_read(1'b1)); + endfunction +endmodule diff --git a/test_regress/t/t_covergroup_with_sample_zeroargs.py b/test_regress/t/t_covergroup_with_sample_zeroargs.py new file mode 100755 index 000000000..319c0ff4a --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_zeroargs.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt') + +test.compile() + +test.passes() diff --git a/test_regress/t/t_covergroup_with_sample_zeroargs.v b/test_regress/t/t_covergroup_with_sample_zeroargs.v new file mode 100644 index 000000000..e8b42e3f3 --- /dev/null +++ b/test_regress/t/t_covergroup_with_sample_zeroargs.v @@ -0,0 +1,15 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +/* verilator lint_off COVERIGN */ +module t; + covergroup cg0 with function sample (); + endgroup + cg0 cov = new(); + function void run(); + cov.sample(); + endfunction +endmodule