From a1160a85a32cd0535a24cdd47e42651826cab133 Mon Sep 17 00:00:00 2001 From: Aleksander Kiryk Date: Mon, 16 Jan 2023 17:41:02 +0100 Subject: [PATCH] Support p format for UnpackArray (#3877) --- src/V3Width.cpp | 1 + test_regress/t/t_unpacked_array_p_fmt.out | 3 +++ test_regress/t/t_unpacked_array_p_fmt.pl | 22 ++++++++++++++++++++++ test_regress/t/t_unpacked_array_p_fmt.v | 22 ++++++++++++++++++++++ 4 files changed, 48 insertions(+) create mode 100644 test_regress/t/t_unpacked_array_p_fmt.out create mode 100755 test_regress/t/t_unpacked_array_p_fmt.pl create mode 100644 test_regress/t/t_unpacked_array_p_fmt.v diff --git a/src/V3Width.cpp b/src/V3Width.cpp index d92eb0043..fbc73703d 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -4591,6 +4591,7 @@ private: || VN_IS(dtypep, WildcardArrayDType) // || VN_IS(dtypep, ClassRefDType) // || VN_IS(dtypep, DynArrayDType) // + || VN_IS(dtypep, UnpackArrayDType) // || VN_IS(dtypep, QueueDType) || (VN_IS(dtypep, StructDType) && !VN_AS(dtypep, StructDType)->packed())) { diff --git a/test_regress/t/t_unpacked_array_p_fmt.out b/test_regress/t/t_unpacked_array_p_fmt.out new file mode 100644 index 000000000..6872828ed --- /dev/null +++ b/test_regress/t/t_unpacked_array_p_fmt.out @@ -0,0 +1,3 @@ +%p='{'h0, 'h1, 'h1, 'h0, 'h1, 'h0, 'h0, 'h1, 'h1, 'h0, 'h0, 'h1, 'h0, 'h1, 'h1, 'h0} +%p='{'{'h0, 'h1, 'h1, 'h0} , '{'h1, 'h0, 'h0, 'h1} , '{'h1, 'h0, 'h0, 'h1} , '{'h0, 'h1, 'h1, 'h0} } +*-* All Finished *-* diff --git a/test_regress/t/t_unpacked_array_p_fmt.pl b/test_regress/t/t_unpacked_array_p_fmt.pl new file mode 100755 index 000000000..6e4e9e231 --- /dev/null +++ b/test_regress/t/t_unpacked_array_p_fmt.pl @@ -0,0 +1,22 @@ +#!/usr/bin/env perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2023 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(simulator => 1); + +compile( + ); + +execute( + expect_filename => $Self->{golden_filename}, + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_unpacked_array_p_fmt.v b/test_regress/t/t_unpacked_array_p_fmt.v new file mode 100644 index 000000000..64ee8a33a --- /dev/null +++ b/test_regress/t/t_unpacked_array_p_fmt.v @@ -0,0 +1,22 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2023 by Antmicro Ltd. +// SPDX-License-Identifier: CC0-1.0 + +module t (/*AUTOARG*/); + reg arr [15:0]; + reg mat [3:0] [3:0]; + + initial begin + for (int i = 0; i < 16; i++) begin + arr[i] = ^i; + mat[i/4][i%4] = ^i; + end + + $display("%%p=%p", arr); + $display("%%p=%p", mat); + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule