From 9fc223d3eeceb0e01f201ebfb1592f9922990a2c Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Fri, 6 Jun 2025 09:59:05 -0400
Subject: [PATCH] Commentary: FPGA PROCASSINIT guidance (#6067)

---
 docs/guide/warnings.rst | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index d78fac0c5..a26b39bf5 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1473,7 +1473,9 @@ List Of Warnings
    Warns that the specified signal is given an initial value where it is
    declared, and is also driven in an always process.  Typically such
    initial values should instead be set using a reset signal inside the
-   process, to match requirements of hardware synthesis tools.
+   process, to match requirements of ASIC synthesis tools.  However,
+   declaration initializers are a valid FPGA design idiom and therefore,
+   FPGA users may want to disable this warning.
 
    Faulty example: