diff --git a/Changes b/Changes
index b3fa6ab1d..c8148f4f3 100644
--- a/Changes
+++ b/Changes
@@ -17,6 +17,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
 
 ****  Fix examples not flushing vcd (#2787).  [Richard E George]
 
+****  Fix little endian packed array pattern assignment (#2795).  [Alex Torregrosa]
+
 
 * Verilator 4.108 2021-01-10
 
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 80324ec6a..1ee1972d6 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -3427,9 +3427,10 @@ private:
     void patternArray(AstPattern* nodep, AstNodeArrayDType* arrayDtp, AstPatMember* defaultp) {
         VNumRange range = arrayDtp->declRange();
         PatVecMap patmap = patVectorMap(nodep, range);
-        UINFO(9, "ent " << range.hi() << " to " << range.lo() << endl);
+        UINFO(9, "ent " << range.left() << " to " << range.right() << endl);
         AstNode* newp = nullptr;
-        for (int ent = range.hi(); ent >= range.lo(); --ent) {
+        for (int entn = 0, ent = range.left(); entn < range.elements();
+             ++entn, ent += range.leftToRightInc()) {
             AstPatMember* newpatp = nullptr;
             AstPatMember* patp = nullptr;
             const auto it = patmap.find(ent);
diff --git a/test_regress/t/t_array_packed_endian.v b/test_regress/t/t_array_packed_endian.v
index 6af307eea..5a4fa03f0 100644
--- a/test_regress/t/t_array_packed_endian.v
+++ b/test_regress/t/t_array_packed_endian.v
@@ -28,6 +28,13 @@ typedef struct packed {
    // verilator lint_on LITENDIAN
 } t2;
 
+logic [2:0][31:0] test2l;
+// verilator lint_off LITENDIAN
+logic [0:2][31:0] test2b;
+logic [0:2][31:0] test1b;
+// verilator lint_on LITENDIAN
+logic [2:0][31:0] test1l;
+
 module t;
    t2 t;
    initial begin
@@ -65,6 +72,23 @@ module t;
       t.dl[7] = 1'b1;
       `checkh(t, 80'h80_0002040000100800_01);
 
+      test1b = '{0, 1, 2};
+      test1l = test1b;
+      test2l = '{2, 1, 0};
+      test2b = test2l;
+      `checkh(test2l[0], 0);
+      `checkh(test2l[2], 2);
+      `checkh(test2l, {32'h2, 32'h1, 32'h0});
+      `checkh(test2b[0], 2);
+      `checkh(test2b[2], 0);
+      `checkh(test2b, {32'h2, 32'h1, 32'h0});
+      `checkh(test1b[0], 0);
+      `checkh(test1b[2], 2);
+      `checkh(test1b, {32'h0, 32'h1, 32'h2});
+      `checkh(test1l[0], 2);
+      `checkh(test1l[2], 0);
+      `checkh(test1l, {32'h0, 32'h1, 32'h2});
+
       $write("*-* All Finished *-*\n");
       $finish;
    end