From 8dcbb528001975922639714a8e95cfc48c6aa0e4 Mon Sep 17 00:00:00 2001
From: Mateusz Gancarz <mgancarz@antmicro.com>
Date: Tue, 25 Feb 2025 15:28:16 +0100
Subject: [PATCH] [#73220] add t_trace_abort_saif test

---
 test_regress/t/t_trace_abort_saif.out | 21 +++++++++++++++++++++
 test_regress/t/t_trace_abort_saif.py  |  3 ++-
 2 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 test_regress/t/t_trace_abort_saif.out

diff --git a/test_regress/t/t_trace_abort_saif.out b/test_regress/t/t_trace_abort_saif.out
new file mode 100644
index 000000000..95ce9b0a5
--- /dev/null
+++ b/test_regress/t/t_trace_abort_saif.out
@@ -0,0 +1,21 @@
+(SAIFILE
+(SAIFVERSION "2.0")
+(DIRECTION "backward")
+(DESIGN "t")
+(DIVIDER / )
+(TIMESCALE 1ps)
+(DURATION 75)
+  (INSTANCE top
+    (NET
+      (clk (T0 40) (T1 35) (TX 0) (TC 14) (IG 0))
+    )
+    (INSTANCE t
+      (NET
+        (clk (T0 40) (T1 35) (TX 0) (TC 14) (IG 0))
+        (cyc\[0\] (T0 40) (T1 35) (TX 0) (TC 7) (IG 0))
+        (cyc\[1\] (T0 40) (T1 35) (TX 0) (TC 3) (IG 0))
+        (cyc\[2\] (T0 40) (T1 35) (TX 0) (TC 1) (IG 0))
+      )
+    )
+  )
+)
diff --git a/test_regress/t/t_trace_abort_saif.py b/test_regress/t/t_trace_abort_saif.py
index aa5b252f2..3a6cee7b5 100755
--- a/test_regress/t/t_trace_abort_saif.py
+++ b/test_regress/t/t_trace_abort_saif.py
@@ -11,8 +11,9 @@ import vltest_bootstrap
 
 test.scenarios('vlt_all')
 test.top_filename = "t/t_trace_abort.v"
+test.golden_filename = "t/t_trace_abort_saif.out"
 
-test.compile(verilator_flags2=['--cc --trace'])
+test.compile(verilator_flags2=['--cc --trace-saif'])
 
 test.execute(fails=True)