From 8986d1f16f962cf5da097b920322e5cb9d13b157 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 26 Oct 2006 01:20:49 +0000
Subject: [PATCH] Avoid some duplicate sensitivity ifs.

git-svn-id: file://localhost/svn/verilator/trunk/verilator@830 77ca24e4-aefa-0310-84f0-b9a241c72d87
---
 Changes         | 2 +-
 src/V3Clock.cpp | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/Changes b/Changes
index eca429ade..045de1f7e 100644
--- a/Changes
+++ b/Changes
@@ -5,7 +5,7 @@ indicates the contributor was also the author of the fix; Thanks!
 
 * Verilator 3.6**
 
-***  Add --output-split-cfuncs for accelerating GCC. [Eugene Weber]
+***  Add --output-split-cfuncs for accelerating GCC compile. [Eugene Weber]
 
 **** Fix $signed mis-extending when input has a WIDTH violation. [Eugene Weber]
 
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index 49a65b880..821904475 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -364,8 +364,7 @@ private:
 		// Move statements to if
 		m_lastIfp->addIfsp(stmtsp);
 	    } else if (nodep->hasSettle()) {
-		// Settlement
-		clearLastSen();
+		// Don't need to: clearLastSen();, as we're adding it to different cfunc
 		// Move statements to function
 		addToSettleLoop(stmtsp);
 	    } else {