diff --git a/test_regress/t/t_assert_comp.v b/test_regress/t/t_assert_comp.v
index 4c4941f5b..d51f679b6 100644
--- a/test_regress/t/t_assert_comp.v
+++ b/test_regress/t/t_assert_comp.v
@@ -6,6 +6,7 @@
 module t (/*AUTOARG*/);
 
    if (0) begin
+      $info("User compile-time info");
       $warning("User compile-time warning");
       $error("User compile-time error");
    end
diff --git a/test_regress/t/t_assert_comp_bad.out b/test_regress/t/t_assert_comp_bad.out
new file mode 100644
index 000000000..4d5109528
--- /dev/null
+++ b/test_regress/t/t_assert_comp_bad.out
@@ -0,0 +1,5 @@
+[0] -Info: t_assert_comp_bad.v:9: Assertion failed in top.t.genblk1: User compile-time info
+[0] %Warning: t_assert_comp_bad.v:10: Assertion failed in top.t.genblk1: User compile-time warning
+[0] %Error: t_assert_comp_bad.v:11: Assertion failed in top.t.genblk1: User compile-time error
+%Error: t/t_assert_comp_bad.v:11: Verilog $stop
+Aborting...
diff --git a/test_regress/t/t_assert_comp_bad.pl b/test_regress/t/t_assert_comp_bad.pl
index f332531a3..941fa8e60 100755
--- a/test_regress/t/t_assert_comp_bad.pl
+++ b/test_regress/t/t_assert_comp_bad.pl
@@ -12,15 +12,13 @@ scenarios(simulator => 1);
 compile(
     verilator_flags2 => ['--assert'],
     nc_flags2 => ['+assert'],
+    vcs_flags2 => ['-assert svaext'],
     );
 
 execute(
     check_finished => 0,
     fails => 1,
-    expect =>
-'.*%Warning: t_assert_comp_bad.v:\d+: Assertion failed in top.t.genblk1: User compile-time warning
-.*%Error: t_assert_comp_bad.v:\d+: Assertion failed in top.t.genblk1: User compile-time error'
-
+    expect_filename => $Self->{golden_filename},
     );
 
 ok(1);
diff --git a/test_regress/t/t_assert_comp_bad.v b/test_regress/t/t_assert_comp_bad.v
index 59229bc89..20a556528 100644
--- a/test_regress/t/t_assert_comp_bad.v
+++ b/test_regress/t/t_assert_comp_bad.v
@@ -6,6 +6,7 @@
 module t (/*AUTOARG*/);
 
    if (1) begin
+      $info("User compile-time info");
       $warning("User compile-time warning");
       $error("User compile-time error");
    end