From 87d856339f73131edcbb1c8d3cc2a51f6cbcc5b1 Mon Sep 17 00:00:00 2001 From: Nick Brereton <85175726+nbstrike@users.noreply.github.com> Date: Tue, 7 Jan 2025 16:52:44 -0500 Subject: [PATCH] Add lint error on importing package within a class (#5634) (#5679) --- docs/CONTRIBUTORS | 1 + src/V3LinkParse.cpp | 7 +++++++ test_regress/t/t_class_scope_import.out | 4 ++++ test_regress/t/t_class_scope_import.py | 16 ++++++++++++++++ test_regress/t/t_class_scope_import.v | 15 +++++++++++++++ test_regress/t/t_queue_unknown_sel.v | 25 ++++++++++++------------- 6 files changed, 55 insertions(+), 13 deletions(-) create mode 100644 test_regress/t/t_class_scope_import.out create mode 100755 test_regress/t/t_class_scope_import.py create mode 100644 test_regress/t/t_class_scope_import.v diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS index fa06407a2..d6ad08718 100644 --- a/docs/CONTRIBUTORS +++ b/docs/CONTRIBUTORS @@ -159,6 +159,7 @@ Nandu Raj Nathan Graybeal Nathan Kohagen Nathan Myers +Nick Brereton Nolan Poe Oleh Maksymenko Patrick Stewart diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp index 4b2116ed0..782ea6c12 100644 --- a/src/V3LinkParse.cpp +++ b/src/V3LinkParse.cpp @@ -893,6 +893,13 @@ class LinkParseVisitor final : public VNVisitor { } iterateChildren(nodep); } + void visit(AstPackageImport* nodep) override { + cleanFileline(nodep); + if (m_modp && !m_ftaskp && VN_IS(m_modp, Class)) { + nodep->v3error("Import statement directly within a class scope is illegal"); + } + iterateChildren(nodep); + } void visit(AstNode* nodep) override { // Default: Just iterate diff --git a/test_regress/t/t_class_scope_import.out b/test_regress/t/t_class_scope_import.out new file mode 100644 index 000000000..4c1811e42 --- /dev/null +++ b/test_regress/t/t_class_scope_import.out @@ -0,0 +1,4 @@ +%Error: t/t_class_scope_import.v:11:14: Import statement directly within a class scope is illegal + 11 | import pkg::*; + | ^~ +%Error: Exiting due to diff --git a/test_regress/t/t_class_scope_import.py b/test_regress/t/t_class_scope_import.py new file mode 100755 index 000000000..55203b6c9 --- /dev/null +++ b/test_regress/t/t_class_scope_import.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2025 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('linter') + +test.lint(fails=True, expect_filename=test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_class_scope_import.v b/test_regress/t/t_class_scope_import.v new file mode 100644 index 000000000..0306ffa6a --- /dev/null +++ b/test_regress/t/t_class_scope_import.v @@ -0,0 +1,15 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2025 by Wilson Snyder +// SPDX-License-Identifier: CC0-1.0 + +package pkg; +endpackage + +class genericClass; + import pkg::*; +endclass + +module tb_top(); +endmodule diff --git a/test_regress/t/t_queue_unknown_sel.v b/test_regress/t/t_queue_unknown_sel.v index 489c7bcee..fa75b6c34 100644 --- a/test_regress/t/t_queue_unknown_sel.v +++ b/test_regress/t/t_queue_unknown_sel.v @@ -262,23 +262,22 @@ interface z_if; ); endinterface class z_txn_class; - import z_pkg::*; - rand txn_type_t req_txn_type; - rand cid_t cid; - rand sid_t sid; - rand ctag_t ctag; - rand stag_t stag; - rand size_t size; - rand address_t address; - rand state_t state1; - rand state_t state2; - rand state_t state3; + rand z_pkg::txn_type_t req_txn_type; + rand z_pkg::cid_t cid; + rand z_pkg::sid_t sid; + rand z_pkg::ctag_t ctag; + rand z_pkg::stag_t stag; + rand z_pkg::size_t size; + rand z_pkg::address_t address; + rand z_pkg::state_t state1; + rand z_pkg::state_t state2; + rand z_pkg::state_t state3; rand logic f1; rand logic f2; rand logic f3; rand logic f4; - data_t data[]; - mask_t mask[]; + z_pkg::data_t data[]; + z_pkg::mask_t mask[]; bit corrupt[]; logic [2:0] req_opcode; endclass