diff --git a/src/verilog.l b/src/verilog.l index 3aae01d07..26bd7fd10 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -545,7 +545,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "local" { FL; return yLOCAL__LEX; } "logic" { FL; return yLOGIC; } "longint" { FL; return yLONGINT; } - "matches" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "matches" { FL; return yMATCHES; } "modport" { FL; return yMODPORT; } "new" { FL; return yNEW__LEX; } "null" { FL; return yNULL; } diff --git a/src/verilog.y b/src/verilog.y index bb3f938f8..20d67cc2c 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -656,7 +656,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"}) %token yLOCAL__LEX "local-in-lex" %token yLOGIC "logic" %token yLONGINT "longint" -//UNSUP %token yMATCHES "matches" +%token yMATCHES "matches" %token yMODPORT "modport" %token yMODULE "module" %token yNAND "nand" @@ -1056,11 +1056,11 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"}) //UNSUP %token prREDUCTION //UNSUP %token prNEGATION //UNSUP %token prEVENTBEGIN -//UNSUP %token prTAGGED +%token prTAGGED // These prevent other conflicts %left yP_ANDANDAND -//UNSUP %left yMATCHES +%left yMATCHES //UNSUP %left prTAGGED //UNSUP %left prSEQ_CLOCKING @@ -3482,7 +3482,9 @@ statement_item: // IEEE: statement_item if ($1 == uniq_UNIQUE) $2->uniquePragma(true); if ($1 == uniq_UNIQUE0) $2->unique0Pragma(true); if ($1 == uniq_PRIORITY) $2->priorityPragma(true); } - //UNSUP caseStart caseAttrE yMATCHES case_patternListE yENDCASE { } + // &&& is part of expr so case_patternListE aliases to case_itemListE + | unique_priorityE caseStart caseAttrE yMATCHES case_patternListE yENDCASE + { $$ = nullptr; BBUNSUP($4, "Unsupported: matches (for tagged union)"); } | unique_priorityE caseStart caseAttrE yINSIDE case_insideListE yENDCASE { $$ = $2; if ($5) $2->addItemsp($5); if (!$2->caseSimple()) $2->v3error("Illegal to have inside on a casex/casez"); @@ -3750,10 +3752,9 @@ caseAttrE: | caseAttrE yVL_PARALLEL_CASE { GRAMMARP->m_caseAttrp->parallelPragma(true); } ; -//UNSUPcase_patternListE: // IEEE: case_pattern_item -//UNSUP // &&& is part of expr so aliases to case_itemList -//UNSUP case_itemListE { $$ = $1; } -//UNSUP ; +case_patternListE: // IEEE: case_pattern_item + case_itemListE { $$ = $1; } + ; case_itemListE: // IEEE: [ { case_item } ] /* empty */ { $$ = nullptr; } @@ -4859,8 +4860,10 @@ expr: // IEEE: part of expression/constant_expression/ // // IEEE: cond_pattern - here to avoid reduce problems // // "expr yMATCHES pattern" // // IEEE: pattern - expanded here to avoid conflicts - //UNSUP ~l~expr yMATCHES patternNoExpr { UNSUP } - //UNSUP ~l~expr yMATCHES ~r~expr { UNSUP } + | ~l~expr yMATCHES patternNoExpr { $$ = new AstConst{$2, AstConst::BitFalse{}}; + BBUNSUP($2, "Unsupported: matches operator"); } + | ~l~expr yMATCHES ~r~expr { $$ = new AstConst{$2, AstConst::BitFalse{}}; + BBUNSUP($2, "Unsupported: matches operator"); } // // // IEEE: expression_or_dist - here to avoid reduce problems // // "expr yDIST '{' dist_list '}'" diff --git a/test_regress/t/t_tagged.out b/test_regress/t/t_tagged.out index b0279d98d..889926ef0 100644 --- a/test_regress/t/t_tagged.out +++ b/test_regress/t/t_tagged.out @@ -8,61 +8,49 @@ %Error-UNSUPPORTED: t/t_tagged.v:18:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 18 | u = tagged m_invalid; | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:21:16: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches' - 21 | case (u) matches - | ^~~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:22:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 22 | tagged m_invalid: ; | ^~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:23:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 23 | tagged m_int: $stop; | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:26:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches' - 26 | if (u matches tagged m_invalid) ; - | ^~~~~~~ +%Error-UNSUPPORTED: t/t_tagged.v:21:16: Unsupported: matches (for tagged union) + 21 | case (u) matches + | ^~~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:26:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 26 | if (u matches tagged m_invalid) ; | ^~~~~~ -%Error: t/t_tagged.v:26:28: syntax error, unexpected IDENTIFIER +%Error-UNSUPPORTED: t/t_tagged.v:26:13: Unsupported: matches operator 26 | if (u matches tagged m_invalid) ; - | ^~~~~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:27:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches' - 27 | if (u matches tagged m_int .n) $stop; | ^~~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:27:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 27 | if (u matches tagged m_int .n) $stop; | ^~~~~~ -%Error: t/t_tagged.v:27:28: syntax error, unexpected IDENTIFIER +%Error-UNSUPPORTED: t/t_tagged.v:27:13: Unsupported: matches operator 27 | if (u matches tagged m_int .n) $stop; - | ^~~~~ + | ^~~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:29:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 29 | u = tagged m_int (123); | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:32:16: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches' - 32 | case (u) matches - | ^~~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:33:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 33 | tagged m_invalid: $stop; | ^~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:34:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 34 | tagged m_int .n: if (n !== 123) $stop; | ^~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:37:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches' - 37 | if (u matches tagged m_invalid) $stop; - | ^~~~~~~ +%Error-UNSUPPORTED: t/t_tagged.v:32:16: Unsupported: matches (for tagged union) + 32 | case (u) matches + | ^~~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:37:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 37 | if (u matches tagged m_invalid) $stop; | ^~~~~~ -%Error: t/t_tagged.v:37:28: syntax error, unexpected IDENTIFIER +%Error-UNSUPPORTED: t/t_tagged.v:37:13: Unsupported: matches operator 37 | if (u matches tagged m_invalid) $stop; - | ^~~~~~~~~ -%Error-UNSUPPORTED: t/t_tagged.v:38:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches' - 38 | if (u matches tagged m_int .n) if (n != 123) $stop; | ^~~~~~~ %Error-UNSUPPORTED: t/t_tagged.v:38:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged' 38 | if (u matches tagged m_int .n) if (n != 123) $stop; | ^~~~~~ -%Error: t/t_tagged.v:38:28: syntax error, unexpected IDENTIFIER +%Error-UNSUPPORTED: t/t_tagged.v:38:13: Unsupported: matches operator 38 | if (u matches tagged m_int .n) if (n != 123) $stop; - | ^~~~~ + | ^~~~~~~ %Error: Exiting due to