diff --git a/test_regress/t/t_trace_packed_struct_saif.out b/test_regress/t/t_trace_packed_struct_saif.out
new file mode 100644
index 000000000..043c2b61b
--- /dev/null
+++ b/test_regress/t/t_trace_packed_struct_saif.out
@@ -0,0 +1,38 @@
+(SAIFILE
+(SAIFVERSION "2.0")
+(DIRECTION "backward")
+(DESIGN "t")
+(DIVIDER / )
+(TIMESCALE 1ps)
+(DURATION 40)
+(INSTANCE top
+  (NET
+    (clk (T0 25) (T1 15) (TX 0) (TC 7))
+  )
+  (INSTANCE t
+    (NET
+      (clk (T0 25) (T1 15) (TX 0) (TC 7))
+      (cnt\[0\] (T0 20) (T1 20) (TX 0) (TC 3))
+      (cnt\[1\] (T0 20) (T1 20) (TX 0) (TC 1))
+      (v[0]\[28\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[0]\[29\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[0]\[32\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[0]\[60\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[0]\[61\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[0]\[65\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[0]\[92\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[0]\[93\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[1]\[29\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[1]\[32\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[1]\[61\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[1]\[65\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[1]\[93\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[2]\[28\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[2]\[32\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[2]\[60\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[2]\[65\] (T0 0) (T1 40) (TX 0) (TC 1))
+      (v[2]\[92\] (T0 0) (T1 40) (TX 0) (TC 1))
+    )
+  )
+)
+)
diff --git a/test_regress/t/t_trace_packed_struct_saif.py b/test_regress/t/t_trace_packed_struct_saif.py
new file mode 100755
index 000000000..60986d596
--- /dev/null
+++ b/test_regress/t/t_trace_packed_struct_saif.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+test.top_filename = "t/t_trace_packed_struct.v"
+
+test.compile(v_flags2=["--trace-saif"])
+
+test.execute()
+
+test.saif_identical(test.trace_filename, test.golden_filename)
+
+test.passes()