diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index ac09746fe..073721400 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -35,13 +35,13 @@ jobs: - { cc: gcc, cxx: g++ } m32: [0, 1] exclude: - # Build pull requests only with ubuntu-20.04 and without m32 + # Build pull requests only with ubuntu-22.04 and without m32 - os: ${{ github.event_name == 'pull_request' && 'ubuntu-18.04' || 'do-not-exclude' }} - - os: ${{ github.event_name == 'pull_request' && 'ubuntu-22.04' || 'do-not-exclude' }} + - os: ${{ github.event_name == 'pull_request' && 'ubuntu-20.04' || 'do-not-exclude' }} - m32: ${{ github.event_name == 'pull_request' && 1 || 'do-not-exclude' }} - # Build -m32 only on ubuntu-20.04 + # Build -m32 only on ubuntu-22.04 - {os: ubuntu-18.04, m32: 1} - - {os: ubuntu-22.04, m32: 1} + - {os: ubuntu-20.04, m32: 1} include: # Build GCC 10 on ubuntu-20.04 - os: ubuntu-20.04 @@ -104,13 +104,13 @@ jobs: m32: [0, 1] suite: [dist-vlt-0, dist-vlt-1, dist-vlt-2, vltmt-0, vltmt-1] exclude: - # Build pull requests only with ubuntu-20.04 and without m32 + # Build pull requests only with ubuntu-22.04 and without m32 - os: ${{ github.event_name == 'pull_request' && 'ubuntu-18.04' || 'do-not-exclude' }} - - os: ${{ github.event_name == 'pull_request' && 'ubuntu-22.04' || 'do-not-exclude' }} + - os: ${{ github.event_name == 'pull_request' && 'ubuntu-20.04' || 'do-not-exclude' }} - m32: ${{ github.event_name == 'pull_request' && 1 || 'do-not-exclude' }} - # Build -m32 only on ubuntu-20.04 + # Build -m32 only on ubuntu-22.04 - {os: ubuntu-18.04, m32: 1} - - {os: ubuntu-22.04, m32: 1} + - {os: ubuntu-20.04, m32: 1} include: # Test with GCC 10 on ubuntu-20.04 without m32 - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: dist-vlt-0} diff --git a/Changes b/Changes index 7a64aee94..7cc019b34 100644 --- a/Changes +++ b/Changes @@ -8,6 +8,60 @@ The changes in each Verilator version are described below. The contributors that suggested a given feature are shown in []. Thanks! +Verilator 5.004 2022-12-14 +========================== + +**Major:** + +* Support named properties (#3667). [Ryszard Rozak, Antmicro Ltd] +* Add ENUMVALUE warning when value misused for enum (#726) (#3777) (#3783). +* Deprecate --no-threads; use --threads 1 for single threaded (#3703). [Kamil Rakoczy, Antmicro Ltd] + +**Minor:** + +* Support std::semaphore and typed std::mailbox (#3708). [Krzysztof Bieganski, Antmicro Ltd] +* Support 'with' in unique, unique_index, min, max in queues (#3772). [Ryszard Rozak, Antmicro Ltd] +* Support events in VCD/FST traces (#3759). [Yves Mathieu] +* Support foreach loops on strings (#3760). [Ryszard Rozak, Antmicro Ltd] +* Support member selects in with clauses (#3775). [Ryszard Rozak, Antmicro Ltd] +* Support super.new calls (#3789). [Ryszard Rozak, Antmicro Ltd] +* Support randcase. +* Support pre_randomize and post_randomize. +* Support $timeunit and $timeprecision. +* Support assignment expressions. +* Change ENDLABEL from warning into an error. +* Internal AST improvements, also affect XML format (#3721). [Geza Lore] +* Deprecate verilated_fst_sc.cpp and verilated_vcd_sc.cpp. +* Disable stack size limit (#3706) (#3751). [Mariusz Glebocki] +* Add error when use --exe with --lib-create (#3785). [Yinan Xu] +* Fix jump handling in do while loops (#3731). [Ryszard Rozak, Antmicro Ltd] +* Fix 'with' clause handling in functions (#3739). [Ryszard Rozak, Antmicro Ltd] +* Fix CONTEXT compile error on mingw64 (#3741). [William D. Jones] +* Fix MSVC compiler errors (#3742) (#3746). [Kritik Bhimani] +* Fix CASEINCOMPLETE when covers all enum values (#3745) (#3782). [Guy-Armand Kamendje] +* Fix return type of $countbits functions to int (#3725). [Ryszard Rozak, Antmicro Ltd] +* Fix timing control in while-break loops (#3733) (#3769). [Ryszard Rozak, Antmicro Ltd] +* Fix return in constructors (#3734). [Ryszard Rozak, Antmicro Ltd] +* Fix missing UNUSED warnings with --coverage (#3736). [alejandro-castro-ortegon] +* Fix tracing parameters overridden with -G (#3723). [Iztok Jeras] +* Fix folding of LogAnd with non-bool operands (#3726). [Geza Lore] +* Fix Dfg optimization issues (#3740) (#3771). [Geza Lore] +* Fix pre/postincrement operations (#3744) (#3756). [Ryszard Rozak, Antmicro Ltd] +* Fix cross-compile for MingW, Arm and RiscV (#3752). [Miodrag Milanović] +* Fix $unit as base package for other packages (#3755). [Ryszard Rozak, Antmicro Ltd] +* Fix make jobserver with submakes (#3758). [Gus Smith] +* Fix to escape VERILATOR_ROOT file paths (#3764) (#3765). [Jiacheng Qian] +* Fix empty string literals converting to string types (#3774). [miree] +* Fix to remove $date from .vcd files (#3779). [Larry Doolittle] +* Fix missing user objects in --lib-create mode (#3780) (#3784). [Yinan Xu] +* Fix non-blocking assignments in forks (#3781) (#3800). [Krzysztof Bieganski, Antmicro Ltd] +* Fix forks without any delayed statements (#3792) (#3801). [Krzysztof Bieganski, Antmicro Ltd] +* Fix internal error in bit op tree optimization (#3793). [Yutetsu TAKATSUKASA] +* Fix lint_off EOFNEWLINE in .vlt files (#3796). [Andrew Nolte] +* Fix wait 0. +* Fix comparing ranged slices of unpacked arrays. + + Verilator 5.002 2022-10-29 ========================== @@ -50,7 +104,7 @@ Verilator 5.002 2022-10-29 * Fix linker errors in user-facing timing functions (#3657). [Krzysztof Bieganski, Antmicro Ltd] * Fix null access on optimized-out fork statements (#3658). [Krzysztof Bieganski, Antmicro Ltd] * Fix VPI inline module naming mismatch (#3690) (#3694). [Jiuyang Liu] -* Fix deadlock in timeprecision when using systemC (#3707). [Kamil Rakoczy, Antmicro Ltd] +* Fix deadlock in timeprecision when using SystemC (#3707). [Kamil Rakoczy, Antmicro Ltd] * Fix width mismatch on inside operator (#3714). [Alex Torregrosa] @@ -2962,7 +3016,7 @@ Verilator 3.502 2005-11-30 Stable * Fix local non-IO variables in public functions and tasks. * Fix bad lifetime optimization when same signal is assigned multiple - times in both branch of a if. [Danny Ding] + times in both branch of an if. [Danny Ding] Verilator 3.501 2005-11-16 Stable @@ -3102,8 +3156,8 @@ Verilator 3.450 2005-07-12 * $finish will no longer exit, but set Verilated::gotFinish(). This enables support for final statements, and for other cleanup code. If this is undesired, redefine the vl_user_finish routine. Top level - loops should use Verilated::gotFinish() as a exit condition for their - loop, and then call top->final(). To prevent a infinite loop, a double + loops should use Verilated::gotFinish() as an exit condition for their + loop, and then call top->final(). To prevent an infinite loop, a double $finish will still exit; this may be removed in future releases. * Support SystemVerilog keywords $bits, $countones, $isunknown, $onehot, $onehot0, always_comb, always_ff, always_latch, finish. @@ -3504,7 +3558,7 @@ Verilator 3.201-beta 2003-12-10 **Major:** * BETA VERSION, USE 3.124 for stable release! -* Version 3.2XX includes a all new back-end. +* Version 3.2XX includes an all new back-end. This includes automatic inlining, flattening of signals between hierarchy, and complete ordering of statements. This results in 60-300% execution speedups, though less pretty C++ output. Even @@ -3533,7 +3587,7 @@ Verilator 3.124 2003-12-05 **Major:** -* A optimized executable will be made by default, in addition to a debug +* An optimized executable will be made by default, in addition to a debug executable. Invoking Verilator with --debug will pick the debug version. **Minor:** diff --git a/Makefile.in b/Makefile.in index a8dd0a7fa..fdc785945 100644 --- a/Makefile.in +++ b/Makefile.in @@ -204,6 +204,7 @@ VL_INST_INC_BLDDIR_FILES = \ # Files under srcdir, instead of build time VL_INST_INC_SRCDIR_FILES = \ include/*.[chv]* \ + include/*.sv \ include/gtkwave/*.[chv]* \ include/vltstd/*.[chv]* \ @@ -302,35 +303,57 @@ install-all: installbin installman installdata install-msg install-here: installman info # Use --xml flag to see the cppcheck code to use for suppression -CPPCHECK_CPP = $(wildcard \ - $(srcdir)/examples/*/*.cpp \ - $(srcdir)/include/*.cpp \ - $(srcdir)/src/*.cpp ) -CPPCHECK_H = $(wildcard \ +CPPCHECK1_CPP = $(wildcard $(srcdir)/include/*.cpp) +CPPCHECK2_CPP = $(wildcard $(srcdir)/examples/*/*.cpp) +CPPCHECK3_CPP = $(wildcard $(srcdir)/src/Vlc*.cpp) +CPPCHECK4_CPP = $(wildcard $(srcdir)/src/V3[A-D]*.cpp $(srcdir)/src/Verilator*.cpp) +CPPCHECK5_CPP = $(wildcard $(srcdir)/src/V3[E-I]*.cpp) +CPPCHECK6_CPP = $(wildcard $(srcdir)/src/V3[P-Z]*.cpp) +CPPCHECK7_CPP = $(wildcard $(srcdir)/src/V3[L-R]*.cpp) +CPPCHECK8_CPP = $(wildcard $(srcdir)/src/V3[S-Z]*.cpp) +CHECK_CPP = $(CPPCHECK1_CPP) $(CPPCHECK2_CPP) $(CPPCHECK3_CPP) $(CPPCHECK4_CPP) \ + $(CPPCHECK5_CPP) $(CPPCHECK6_CPP) $(CPPCHECK7_CPP) $(CPPCHECK8_CPP) +CHECK_H = $(wildcard \ $(srcdir)/include/*.h \ $(srcdir)/src/*.h ) -CPPCHECK_YL = $(wildcard \ +CHECK_YL = $(wildcard \ $(srcdir)/src/*.y \ $(srcdir)/src/*.l ) CPPCHECK = src/cppcheck_filtered cppcheck CPPCHECK_FLAGS = --enable=all --inline-suppr \ - --suppress=unusedScopedObject --suppress=cstyleCast --suppress=useInitializationList \ - --suppress=nullPointerRedundantCheck + --suppress=cstyleCast --suppress=useInitializationList \ + --suppress=nullPointer --suppress=nullPointerRedundantCheck --suppress=ctunullpointer \ + --suppress=unusedFunction --suppress=unusedScopedObject \ + --suppress=useStlAlgorithm CPPCHECK_FLAGS += --xml -CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CPPCHECK_CPP)) +CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CHECK_CPP)) CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/src/obj_dbg -I$(srcdir)/src -cppcheck: $(CPPCHECK_DEP) -%.cppcheck: %.cpp - $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 -DVL_THREADED=1 $(CPPCHECK_INC) $< +cppcheck: cppcheck-1 cppcheck-2 cppcheck-3 cppcheck-4 cppcheck-5 cppcheck-6 cppcheck-7 cppcheck-8 +cppcheck-1: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK1_CPP) +cppcheck-2: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK2_CPP) +cppcheck-3: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK3_CPP) +cppcheck-4: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK4_CPP) +cppcheck-5: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK5_CPP) +cppcheck-6: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK6_CPP) +cppcheck-7: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK7_CPP) +cppcheck-8: + $(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK8_CPP) CLANGTIDY = clang-tidy CLANGTIDY_FLAGS = -config='' \ -header-filter='.*' \ -checks='-fuchsia-*,-cppcoreguidelines-avoid-c-arrays,-cppcoreguidelines-init-variables,-cppcoreguidelines-avoid-goto,-modernize-avoid-c-arrays,-readability-magic-numbers,-readability-simplify-boolean-expr,-cppcoreguidelines-macro-usage' \ -CLANGTIDY_DEP = $(subst .cpp,.cpp.tidy,$(CPPCHECK_CPP)) -CLANGTIDY_DEFS = -DVL_DEBUG=1 -DVL_THREADED=1 -DVL_CPPCHECK=1 +CLANGTIDY_DEP = $(subst .cpp,.cpp.tidy,$(CHECK_CPP)) +CLANGTIDY_DEFS = -DVL_DEBUG=1 -DVL_CPPCHECK=1 clang-tidy: $(CLANGTIDY_DEP) %.cpp.tidy: %.cpp @@ -350,7 +373,7 @@ format: clang-format yapf format-pl-exec CLANGFORMAT = clang-format-14 CLANGFORMAT_FLAGS = -i -CLANGFORMAT_FILES = $(CPPCHECK_CPP) $(CPPCHECK_H) $(CPPCHECK_YL) test_regress/t/*.c* test_regress/t/*.h +CLANGFORMAT_FILES = $(CHECK_CPP) $(CHECK_H) $(CHECK_YL) test_regress/t/*.c* test_regress/t/*.h clang-format: @$(CLANGFORMAT) --version | egrep 14.0 > /dev/null \ diff --git a/README.rst b/README.rst index d46296d02..02b0593e1 100644 --- a/README.rst +++ b/README.rst @@ -29,10 +29,10 @@ Welcome to Verilator * - |verilator multithreaded performance| - **Fast** * Outperforms many closed-source commercial simulators - * Single- and multi-threaded output models + * Single- and multithreaded output models * - **Widely Used** * Wide industry and academic deployment - * Out-of-the-box support from Arm, and RISC-V vendor IP + * Out-of-the-box support from Arm and RISC-V vendor IP - |verilator usage| * - |verilator community| - **Community Driven & Openly Licensed** @@ -52,7 +52,7 @@ What Verilator Does Verilator is invoked with parameters similar to GCC or Synopsys's VCS. It "Verilates" the specified Verilog or SystemVerilog code by reading it, performing lint checks, and optionally inserting assertion checks and -coverage-analysis points. It outputs single- or multi-threaded .cpp and .h +coverage-analysis points. It outputs single- or multithreaded .cpp and .h files, the "Verilated" code. These Verilated C++/SystemC files are then compiled by a C++ compiler @@ -61,11 +61,11 @@ file to instantiate the Verilated model. Executing the resulting executable performs the design simulation. Verilator also supports linking Verilated generated libraries, optionally encrypted, into other simulators. -Verilator may not be the best choice if you are expecting a full featured -replacement for a closed-source Verilog simulator, need SDF annotation, +Verilator may not be the best choice if you are expecting a full-featured +replacement for a closed-source Verilog simulator, needs SDF annotation, mixed-signal simulation, or are doing a quick class project (we recommend `Icarus Verilog`_ for classwork.) However, if you are looking for a path -to migrate SystemVerilog to C++/SystemC, or want high speed simulation of +to migrate SystemVerilog to C++/SystemC, or want high-speed simulation of synthesizable designs containing limited verification constructs, Verilator is the tool for you. @@ -86,7 +86,7 @@ Verilator has typically similar or better performance versus the closed-source Verilog simulators (Carbon Design Systems Carbonator, Modelsim/Questa, Cadence Incisive/NC-Verilog, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But, Verilator is open-sourced, so you can spend on -computes rather than licenses. Thus Verilator gives you the best +computes rather than licenses. Thus, Verilator gives you the best cycles/dollar. @@ -101,7 +101,7 @@ For more information: - `Verilator manual (HTML) `_, or `Verilator manual (PDF) `_ -- `Subscribe to verilator announcements +- `Subscribe to Verilator announcements `_ - `Verilator forum `_ @@ -132,7 +132,7 @@ Related Projects - `GTKwave `_ - Waveform viewer for Verilator traces. -- `Icarus Verilog`_ - Icarus is a full featured interpreted Verilog +- `Icarus Verilog`_ - Icarus is a full-featured interpreted Verilog simulator. If Verilator does not support your needs, perhaps Icarus may. diff --git a/bin/verilator b/bin/verilator index cd3a25c35..be1156d0f 100755 --- a/bin/verilator +++ b/bin/verilator @@ -31,6 +31,7 @@ my $opt_gdb; my $opt_rr; my $opt_gdbbt; my $opt_quiet_exit; +my $opt_unlimited_stack = 1; # No arguments can't do anything useful. Give help if ($#ARGV < 0) { @@ -49,16 +50,17 @@ foreach my $sw (@ARGV) { Getopt::Long::config("no_auto_abbrev", "pass_through"); if (! GetOptions( # Major operating modes - "help" => \&usage, - "debug" => \&debug, - # "version!" => \&version, # Also passthru'ed + "help" => \&usage, + "debug" => \&debug, + # "version!" => \&version, # Also passthru'ed # Switches - "gdb!" => \$opt_gdb, - "gdbbt!" => \$opt_gdbbt, - "quiet-exit!" => \$opt_quiet_exit, - "rr!" => \$opt_rr, + "gdb!" => \$opt_gdb, + "gdbbt!" => \$opt_gdbbt, + "quiet-exit!" => \$opt_quiet_exit, + "rr!" => \$opt_rr, + "unlimited-stack!" => \$opt_unlimited_stack, # Additional parameters - "<>" => sub {}, # Ignored + "<>" => sub {}, # Ignored )) { pod2usage(-exitstatus => 2, -verbose => 0); } @@ -76,7 +78,8 @@ if ($opt_gdbbt && !gdb_works()) { my @quoted_sw = map { sh_escape($_) } @Opt_Verilator_Sw; if ($opt_gdb) { # Generic GDB interactive - run (aslr_off() + run (ulimit_stack_unlimited() + . aslr_off() . ($ENV{VERILATOR_GDB} || "gdb") . " " . verilator_bin() # Note, uncomment to set breakpoints before running: @@ -92,12 +95,14 @@ if ($opt_gdb) { . " -ex 'bt'"); } elsif ($opt_rr) { # Record with rr - run (aslr_off() + run (ulimit_stack_unlimited() + . aslr_off() . "rr record " . verilator_bin() . " " . join(' ', @quoted_sw)); } elsif ($opt_gdbbt && $Debug) { # Run under GDB to get gdbbt - run (aslr_off() + run (ulimit_stack_unlimited() + . aslr_off() . "gdb" . " " . verilator_bin() . " --batch --quiet --return-child-result" @@ -106,10 +111,13 @@ if ($opt_gdb) { . " -ex 'bt' -ex 'quit'"); } elsif ($Debug) { # Debug - run(aslr_off() . verilator_bin() . " " . join(' ', @quoted_sw)); + run(ulimit_stack_unlimited() + . aslr_off() + . verilator_bin() + . " " . join(' ', @quoted_sw)); } else { # Normal, non gdb - run(verilator_bin() . " " . join(' ', @quoted_sw)); + run(ulimit_stack_unlimited() . verilator_bin() . " " . join(' ', @quoted_sw)); } #---------------------------------------------------------------------- @@ -180,6 +188,17 @@ sub aslr_off { } } +sub ulimit_stack_unlimited { + return "" if !$opt_unlimited_stack; + system("ulimit -s unlimited 2>/dev/null"); + my $status = $?; + if ($status == 0) { + return "ulimit -s unlimited 2>/dev/null; exec "; + } else { + return ""; + } +} + sub run { # Run command, check errors my $command = shift; @@ -268,7 +287,7 @@ detailed descriptions of these arguments. =for VL_SPHINX_EXTRACT "_build/gen/args_verilator.rst" - Verilog package, module and top module filenames + Verilog package, module, and top module filenames Optional C++ files to compile in Optional C++ files to link in @@ -360,23 +379,22 @@ detailed descriptions of these arguments. --MP Create phony dependency targets +notimingchecks Ignored -O0 Disable optimizations - -O3 High performance optimizations + -O3 High-performance optimizations -O Selectable optimizations -o Name of final executable --no-order-clock-delay Disable ordering clock enable assignments - --no-verilate Skip Verilation, only compile previously Verilated code --output-split Split .cpp files into pieces --output-split-cfuncs Split model functions --output-split-ctrace Split tracing functions -P Disable line numbers and blanks with -E - --pins-bv Specify types for top level ports - --pins-sc-biguint Specify types for top level ports - --pins-sc-uint Specify types for top level ports - --pins-uint8 Specify types for top level ports + --pins-bv Specify types for top-level ports + --pins-sc-biguint Specify types for top-level ports + --pins-sc-uint Specify types for top-level ports + --pins-uint8 Specify types for top-level ports --no-pins64 Don't use uint64_t's for 33-64 bit sigs --pipe-filter Filter all input through a script --pp-comments Show preprocessor comments with -E - --prefix Name of top level class + --prefix Name of top-level class --private Debugging; see docs --prof-c Compile C++ code with profiling --prof-cfuncs Name functions for profiling @@ -408,7 +426,7 @@ detailed descriptions of these arguments. --timescale Sets default timescale --timescale-override Overrides all timescales --top Alias of --top-module - --top-module Name of top level input module + --top-module Name of top-level input module --trace Enable waveform creation --trace-coverage Enable tracing of coverage --trace-depth Depth of tracing @@ -420,12 +438,13 @@ detailed descriptions of these arguments. --trace-threads Enable FST waveform creation on separate threads --trace-underscore Enable tracing of _signals -U Undefine preprocessor define + --no-unlimited-stack Don't disable stack size limit --unroll-count Tune maximum loop iterations --unroll-stmts Tune maximum loop body size --unused-regexp Tune UNUSED lint signals -V Verbose version and config -v Verilog library - --no-verilate Skip verilation and just compile previously Verilated code. + --no-verilate Skip verilation and just compile previously Verilated code +verilog1995ext+ Synonym for +1364-1995ext+ +verilog2001ext+ Synonym for +1364-2001ext+ --version Displays program version and exits diff --git a/bin/verilator_ccache_report b/bin/verilator_ccache_report index f895db4ae..bbb69b9af 100755 --- a/bin/verilator_ccache_report +++ b/bin/verilator_ccache_report @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# pylint: disable=C0103,C0114,C0115,C0116,C0123,C0301,R0902,R0913,R0914,R0912,R0915,W0621 +# pylint: disable=C0103,C0114,C0115,C0116,C0123,C0209,C0301,R0902,R0913,R0914,R0912,R0915,W0621 ###################################################################### import argparse diff --git a/bin/verilator_difftree b/bin/verilator_difftree index d7c65a28e..2bede0e8d 100755 --- a/bin/verilator_difftree +++ b/bin/verilator_difftree @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# pylint: disable=C0103,C0114,C0116 +# pylint: disable=C0103,C0114,C0116,C0209 ###################################################################### import argparse @@ -73,7 +73,7 @@ def diff_file(a, b): def version_from(filename): # Return dump format - with open(filename) as fh: + with open(filename, "r", encoding="utf8") as fh: lineno = 0 for line in fh: if lineno > 10: @@ -86,8 +86,8 @@ def version_from(filename): def filterf(fn1, fn2): # Remove hex numbers before diffing - with open(fn1) as fh1: - with open(fn2, "w") as fh2: + with open(fn1, "r", encoding="utf8") as fh1: + with open(fn2, "w", encoding="utf8") as fh2: for line in fh1: if re.search(r' This=', line): continue diff --git a/bin/verilator_gantt b/bin/verilator_gantt index 03a7a16af..cfab96456 100755 --- a/bin/verilator_gantt +++ b/bin/verilator_gantt @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# pylint: disable=C0103,C0114,C0116,C0301,R0914,R0912,R0915,W0511,eval-used +# pylint: disable=C0103,C0114,C0116,C0209,C0301,R0914,R0912,R0915,W0511,eval-used ###################################################################### import argparse @@ -29,7 +29,7 @@ def process(filename): def read_data(filename): - with open(filename) as fh: + with open(filename, "r", encoding="utf8") as fh: re_thread = re.compile(r'^VLPROFTHREAD (\d+)$') re_record = re.compile(r'^VLPROFEXEC (\S+) (\d+)(.*)$') re_payload_mtaskBegin = re.compile( @@ -318,7 +318,7 @@ def report_cpus(): def write_vcd(filename): print("Writing %s" % filename) - with open(filename, "w") as fh: + with open(filename, "w", encoding="utf8") as fh: vcd = { 'values': collections.defaultdict(lambda: {}), # {