From 83cf1882de5d7284cc2a8c8e0e9a3cc274db9792 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 11 Jul 2019 20:49:35 -0400 Subject: [PATCH] Quote reserved word messages, and related internal cleanups. --- src/V3FileLine.h | 1 - src/V3PreLex.h | 1 + src/V3PreLex.l | 12 +- src/V3PreProc.cpp | 2 +- src/verilog.l | 275 +++++++++++++++-------------- test_regress/t/t_lint_rsvd_bad.out | 4 + test_regress/t/t_lint_rsvd_bad.pl | 19 ++ test_regress/t/t_lint_rsvd_bad.v | 10 ++ 8 files changed, 182 insertions(+), 142 deletions(-) create mode 100644 test_regress/t/t_lint_rsvd_bad.out create mode 100755 test_regress/t/t_lint_rsvd_bad.pl create mode 100644 test_regress/t/t_lint_rsvd_bad.v diff --git a/src/V3FileLine.h b/src/V3FileLine.h index ca43032b3..4599de798 100644 --- a/src/V3FileLine.h +++ b/src/V3FileLine.h @@ -129,7 +129,6 @@ public: void parent(FileLine* fileline) { m_parent = fileline; } void lineDirective(const char* textp, int& enterExitRef); void linenoInc() { m_lineno++; } - void linenoIncInPlace() { m_lineno++; } int lineno() const { return m_lineno; } FileLine* parent() const { return m_parent; } diff --git a/src/V3PreLex.h b/src/V3PreLex.h index 28475db48..05204e425 100644 --- a/src/V3PreLex.h +++ b/src/V3PreLex.h @@ -199,6 +199,7 @@ class V3PreLex { void lineDirective(const char* textp); void linenoInc() { if (curStreamp()->m_ignNewlines) curStreamp()->m_ignNewlines--; else curFilelinep()->linenoInc(); } + void warnBackslashSpace(); // Called by V3PreProc.cpp to inform lexer void pushStateDefArg(int level); void pushStateDefForm(); diff --git a/src/V3PreLex.l b/src/V3PreLex.l index 408714bf3..103ca7753 100644 --- a/src/V3PreLex.l +++ b/src/V3PreLex.l @@ -113,7 +113,7 @@ bom [\357\273\277] {word} { yymore(); } [^\"\\] { yymore(); } [\\]{crnl} { linenoInc(); yymore(); } -[\\]{wsn}+{crnl} { yyless(1); LEXP->curFilelinep()->v3warn(BSSPACE, "Backslash followed by whitespace, perhaps the whitespace is accidental?"); } +[\\]{wsn}+{crnl} { yyless(1); LEXP->warnBackslashSpace(); } [\\]. { yymore(); } {quote} { yy_pop_state(); if (LEXP->m_parenLevel || LEXP->m_defQuote) { @@ -167,7 +167,7 @@ bom [\357\273\277] {drop} { } <> { linenoInc(); yy_pop_state(); yyerrorf("Unterminated ( in define formal arguments."); yyleng=0; return VP_DEFFORM; } {crnl} { linenoInc(); appendDefValue((char*)"\n", 1); } /* Include return so can maintain output line count */ -[\\]{wsn}+{crnl} { yyless(1); LEXP->curFilelinep()->v3warn(BSSPACE, "Backslash followed by whitespace, perhaps the whitespace is accidental?"); } +[\\]{wsn}+{crnl} { yyless(1); LEXP->warnBackslashSpace(); } [\\]{crnl} { linenoInc(); appendDefValue((char*)"\\\n", 2); } /* Include return so can maintain output line count */ {quote} { LEXP->m_defQuote=true; yy_push_state(STRMODE); yymore(); } /* Legal only in default values */ "`\\`\"" { appendDefValue(yytext, yyleng); } /* Maybe illegal, otherwise in default value */ @@ -185,7 +185,7 @@ bom [\357\273\277] {drop} { } <> { linenoInc(); yy_pop_state(); yytext=(char*)"\n"; yyleng=1; return VP_DEFVALUE; } /* Technically illegal, but people complained */ {crnl} { linenoInc(); yy_pop_state(); yytext=(char*)"\n"; yyleng=1; return VP_DEFVALUE; } -[\\]{wsn}+{crnl} { yyless(1); LEXP->curFilelinep()->v3warn(BSSPACE, "Backslash followed by whitespace, perhaps the whitespace is accidental?"); } +[\\]{wsn}+{crnl} { yyless(1); LEXP->warnBackslashSpace(); } [\\]{crnl} { linenoInc(); appendDefValue((char*)"\\\n", 2); } /* Return, AND \ is part of define value */ {quote} { LEXP->m_defQuote = true; yy_push_state(STRMODE); yymore(); } [^\/\*\n\r\\\"]+ | @@ -196,7 +196,7 @@ bom [\357\273\277] /* - if no \{crnl} ending then the comment belongs to the next line, as a non-embedded comment */ /* - if all but (say) 3rd line is missing \ then it's indeterminate */ "*/" { yy_pop_state(); appendDefValue(yytext, yyleng); } -[\\]{wsn}+{crnl} { yyless(1); LEXP->curFilelinep()->v3warn(BSSPACE, "Backslash followed by whitespace, perhaps the whitespace is accidental?"); } +[\\]{wsn}+{crnl} { yyless(1); LEXP->warnBackslashSpace(); } [\\]{crnl} { linenoInc(); LEXP->m_defCmtSlash=true; appendDefValue(yytext, yyleng-2); appendDefValue((char*)"\n", 1); } /* Return but not \ */ {crnl} { linenoInc(); yymore(); if (LEXP->m_defCmtSlash) yyerrorf("One line of /* ... */ is missing \\ before newline"); @@ -508,6 +508,10 @@ void V3PreLex::lineDirective(const char* textp) { V3File::addSrcDepend(curFilelinep()->filename()); } +void V3PreLex::warnBackslashSpace() { + curFilelinep()->v3warn(BSSPACE, "Backslash followed by whitespace, perhaps the whitespace is accidental?"); +} + void V3PreLex::dumpSummary() { cout<<"- pp::dumpSummary curBuf="<linenoIncInPlace(); + m_finFilelinep->linenoInc(); } else { m_finAtBol = false; } diff --git a/src/verilog.l b/src/verilog.l index df52290d5..2855637bc 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -52,6 +52,9 @@ extern void yyerrorf(const char* format, ...); if (!v3Global.opt.bboxSys()) yyerrorf(msg, yytext); \ return yaD_IGNORE; } +#define ERROR_RSVD_WORD(language) \ + yyerrorf("Unsupported: " language " reserved word not implemented: '%s'", yytext) + // See V3Read.cpp //void V3ParseImp::statePop() { yy_pop_state(); } @@ -351,16 +354,16 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "signed" { FL; return ySIGNED; } "unsigned" { FL; return yUNSIGNED; } /* Generic unsupported keywords */ - "cell" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } - "config" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } - "design" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } - "endconfig" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } - "incdir" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } + "cell" { ERROR_RSVD_WORD("Verilog 2001-config"); } + "config" { ERROR_RSVD_WORD("Verilog 2001-config"); } + "design" { ERROR_RSVD_WORD("Verilog 2001-config"); } + "endconfig" { ERROR_RSVD_WORD("Verilog 2001-config"); } + "incdir" { ERROR_RSVD_WORD("Verilog 2001-config"); } "include" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented; probably you want `include instead: %s", yytext); } - "instance" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } - "liblist" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } - "library" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } - "use" { yyerrorf("Unsupported: Verilog 2001-config reserved word not implemented: %s", yytext); } + "instance" { ERROR_RSVD_WORD("Verilog 2001-config"); } + "liblist" { ERROR_RSVD_WORD("Verilog 2001-config"); } + "library" { ERROR_RSVD_WORD("Verilog 2001-config"); } + "use" { ERROR_RSVD_WORD("Verilog 2001-config"); } } /* Verilog 2005 */ @@ -457,44 +460,44 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "void" { FL; return yVOID; } /* Generic unsupported warnings */ /* Note assert_strobe was in SystemVerilog 3.1, but removed for SystemVerilog 2005 */ - "$root" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "before" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "bins" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "binsof" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "class" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "constraint" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "covergroup" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "coverpoint" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "cross" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "dist" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "endclass" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "endgroup" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "endsequence" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "expect" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "extends" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "first_match" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "ignore_bins" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "illegal_bins" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "intersect" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "join_any" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "join_none" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "local" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "matches" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "new" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "protected" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "randomize" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "randsequence" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "sequence" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "solve" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "super" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "tagged" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "this" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "throughout" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "virtual" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "wait_order" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "wildcard" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "with" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } - "within" { yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s", yytext); } + "$root" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "before" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "binsof" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "class" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "constraint" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "covergroup" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "coverpoint" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "cross" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "dist" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "endclass" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "endgroup" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "endsequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "expect" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "extends" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "first_match" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "ignore_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "illegal_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "intersect" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "join_any" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "join_none" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "local" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "matches" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "new" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "protected" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "randomize" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "randsequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "sequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "solve" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "super" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "tagged" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "this" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "throughout" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "virtual" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "wait_order" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "wildcard" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "with" { ERROR_RSVD_WORD("SystemVerilog 2005"); } + "within" { ERROR_RSVD_WORD("SystemVerilog 2005"); } } /* SystemVerilog 2009 */ @@ -503,35 +506,35 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "global" { FL; return yGLOBAL__LEX; } "unique0" { FL; return yUNIQUE0; } /* Generic unsupported warnings */ - "accept_on" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "checker" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "endchecker" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "eventually" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "implies" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "let" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "nexttime" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "reject_on" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "s_always" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "s_eventually" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "s_nexttime" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "s_until" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "s_until_with" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "strong" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "sync_accept_on" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "sync_reject_on" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "until" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "until_with" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "untyped" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } - "weak" { yyerrorf("Unsupported: SystemVerilog 2009 reserved word not implemented: %s", yytext); } + "accept_on" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "checker" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "endchecker" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "eventually" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "implies" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "let" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "nexttime" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "reject_on" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "s_always" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "s_eventually" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "s_nexttime" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "s_until" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "s_until_with" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "strong" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "sync_accept_on" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "sync_reject_on" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "until" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "until_with" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "untyped" { ERROR_RSVD_WORD("SystemVerilog 2009"); } + "weak" { ERROR_RSVD_WORD("SystemVerilog 2009"); } } /* System Verilog 2012 */ { /* Keywords */ - "implements" { yyerrorf("Unsupported: SystemVerilog 2012 reserved word not implemented: %s", yytext); } - "interconnect" { yyerrorf("Unsupported: SystemVerilog 2012 reserved word not implemented: %s", yytext); } - "nettype" { yyerrorf("Unsupported: SystemVerilog 2012 reserved word not implemented: %s", yytext); } - "soft" { yyerrorf("Unsupported: SystemVerilog 2012 reserved word not implemented: %s", yytext); } + "implements" { ERROR_RSVD_WORD("SystemVerilog 2012"); } + "interconnect" { ERROR_RSVD_WORD("SystemVerilog 2012"); } + "nettype" { ERROR_RSVD_WORD("SystemVerilog 2012"); } + "soft" { ERROR_RSVD_WORD("SystemVerilog 2012"); } } /* System Verilog 2017 */ @@ -553,92 +556,92 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} { /* Generic unsupported warnings */ - "above" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "abs" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "absdelay" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "abstol" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "ac_stim" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "access" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "acos" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "acosh" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "aliasparam" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "analog" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "analysis" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "above" { ERROR_RSVD_WORD("AMS"); } + "abs" { ERROR_RSVD_WORD("AMS"); } + "absdelay" { ERROR_RSVD_WORD("AMS"); } + "abstol" { ERROR_RSVD_WORD("AMS"); } + "ac_stim" { ERROR_RSVD_WORD("AMS"); } + "access" { ERROR_RSVD_WORD("AMS"); } + "acos" { ERROR_RSVD_WORD("AMS"); } + "acosh" { ERROR_RSVD_WORD("AMS"); } + "aliasparam" { ERROR_RSVD_WORD("AMS"); } + "analog" { ERROR_RSVD_WORD("AMS"); } + "analysis" { ERROR_RSVD_WORD("AMS"); } "asin" { FL; return yD_ASIN; } "asinh" { FL; return yD_ASINH; } - "assert" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "assert" { ERROR_RSVD_WORD("AMS"); } "atan" { FL; return yD_ATAN; } "atan2" { FL; return yD_ATAN2; } "atanh" { FL; return yD_ATANH; } - "branch" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "branch" { ERROR_RSVD_WORD("AMS"); } "ceil" { FL; return yD_CEIL; } - "connect" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "connectmodule" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "connectrules" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "continuous" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "connect" { ERROR_RSVD_WORD("AMS"); } + "connectmodule" { ERROR_RSVD_WORD("AMS"); } + "connectrules" { ERROR_RSVD_WORD("AMS"); } + "continuous" { ERROR_RSVD_WORD("AMS"); } "cos" { FL; return yD_COS; } "cosh" { FL; return yD_COSH; } - "cross" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "ddt" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "ddt_nature" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "ddx" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "discipline" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "discrete" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "domain" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "driver_update" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "endconnectrules" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "enddiscipline" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "endnature" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "endparamset" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "exclude" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "cross" { ERROR_RSVD_WORD("AMS"); } + "ddt" { ERROR_RSVD_WORD("AMS"); } + "ddt_nature" { ERROR_RSVD_WORD("AMS"); } + "ddx" { ERROR_RSVD_WORD("AMS"); } + "discipline" { ERROR_RSVD_WORD("AMS"); } + "discrete" { ERROR_RSVD_WORD("AMS"); } + "domain" { ERROR_RSVD_WORD("AMS"); } + "driver_update" { ERROR_RSVD_WORD("AMS"); } + "endconnectrules" { ERROR_RSVD_WORD("AMS"); } + "enddiscipline" { ERROR_RSVD_WORD("AMS"); } + "endnature" { ERROR_RSVD_WORD("AMS"); } + "endparamset" { ERROR_RSVD_WORD("AMS"); } + "exclude" { ERROR_RSVD_WORD("AMS"); } "exp" { FL; return yD_EXP; } - "final_step" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "flicker_noise" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "final_step" { ERROR_RSVD_WORD("AMS"); } + "flicker_noise" { ERROR_RSVD_WORD("AMS"); } "floor" { FL; return yD_FLOOR; } - "flow" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "from" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "ground" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "flow" { ERROR_RSVD_WORD("AMS"); } + "from" { ERROR_RSVD_WORD("AMS"); } + "ground" { ERROR_RSVD_WORD("AMS"); } "hypot" { FL; return yD_HYPOT; } - "idt" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "idt_nature" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "idtmod" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "inf" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "initial_step" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "laplace_nd" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "laplace_np" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "laplace_zd" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "laplace_zp" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "last_crossing" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "limexp" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "idt" { ERROR_RSVD_WORD("AMS"); } + "idt_nature" { ERROR_RSVD_WORD("AMS"); } + "idtmod" { ERROR_RSVD_WORD("AMS"); } + "inf" { ERROR_RSVD_WORD("AMS"); } + "initial_step" { ERROR_RSVD_WORD("AMS"); } + "laplace_nd" { ERROR_RSVD_WORD("AMS"); } + "laplace_np" { ERROR_RSVD_WORD("AMS"); } + "laplace_zd" { ERROR_RSVD_WORD("AMS"); } + "laplace_zp" { ERROR_RSVD_WORD("AMS"); } + "last_crossing" { ERROR_RSVD_WORD("AMS"); } + "limexp" { ERROR_RSVD_WORD("AMS"); } "ln" { FL; return yD_LN; } "log" { FL; return yD_LOG10; } - "max" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "merged" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "min" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "nature" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "net_resolution" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "noise_table" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "paramset" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "potential" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "max" { ERROR_RSVD_WORD("AMS"); } + "merged" { ERROR_RSVD_WORD("AMS"); } + "min" { ERROR_RSVD_WORD("AMS"); } + "nature" { ERROR_RSVD_WORD("AMS"); } + "net_resolution" { ERROR_RSVD_WORD("AMS"); } + "noise_table" { ERROR_RSVD_WORD("AMS"); } + "paramset" { ERROR_RSVD_WORD("AMS"); } + "potential" { ERROR_RSVD_WORD("AMS"); } "pow" { FL; return yD_POW; } - "resolveto" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "resolveto" { ERROR_RSVD_WORD("AMS"); } "sin" { FL; return yD_SIN; } "sinh" { FL; return yD_SINH; } - "slew" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "split" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "slew" { ERROR_RSVD_WORD("AMS"); } + "split" { ERROR_RSVD_WORD("AMS"); } "sqrt" { FL; return yD_SQRT; } "string" { FL; return ySTRING; } "tan" { FL; return yD_TAN; } "tanh" { FL; return yD_TANH; } - "timer" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "transition" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "units" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "white_noise" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "timer" { ERROR_RSVD_WORD("AMS"); } + "transition" { ERROR_RSVD_WORD("AMS"); } + "units" { ERROR_RSVD_WORD("AMS"); } + "white_noise" { ERROR_RSVD_WORD("AMS"); } "wreal" { FL; return yWREAL; } - "zi_nd" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "zi_np" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "zi_zd" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } - "zi_zp" { yyerrorf("Unsupported: AMS reserved word not implemented: %s", yytext); } + "zi_nd" { ERROR_RSVD_WORD("AMS"); } + "zi_np" { ERROR_RSVD_WORD("AMS"); } + "zi_zd" { ERROR_RSVD_WORD("AMS"); } + "zi_zp" { ERROR_RSVD_WORD("AMS"); } } /************************************************************************/ diff --git a/test_regress/t/t_lint_rsvd_bad.out b/test_regress/t/t_lint_rsvd_bad.out new file mode 100644 index 000000000..3a3eb12c7 --- /dev/null +++ b/test_regress/t/t_lint_rsvd_bad.out @@ -0,0 +1,4 @@ +%Error: t/t_lint_rsvd_bad.v:6: Unsupported: Verilog 2001-config reserved word not implemented: 'config' +%Error: t/t_lint_rsvd_bad.v:6: syntax error, unexpected IDENTIFIER +%Error: t/t_lint_rsvd_bad.v:7: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig' +%Error: Exiting due to diff --git a/test_regress/t/t_lint_rsvd_bad.pl b/test_regress/t/t_lint_rsvd_bad.pl new file mode 100755 index 000000000..8c8597ccf --- /dev/null +++ b/test_regress/t/t_lint_rsvd_bad.pl @@ -0,0 +1,19 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(linter => 1); + +lint( + verilator_flags2 => ["--lint-only -Wwarn-REALCVT"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_lint_rsvd_bad.v b/test_regress/t/t_lint_rsvd_bad.v new file mode 100644 index 000000000..4639f03d9 --- /dev/null +++ b/test_regress/t/t_lint_rsvd_bad.v @@ -0,0 +1,10 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Wilson Snyder. + +config cfgBad; +endconfig + +module t; +endmodule