diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index b8dce26fe..7877f7b17 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2807,9 +2807,12 @@ private:
                     nodep->packagep(cpackagerefp->packagep());
                 } else {
                     nodep->packagep(cpackagerefp->classOrPackagep());
-                    // if (cpackagerefp->paramsp()) {
-                    //    nodep->v3warn(E_UNSUPPORTED, "Unsupported: parameterized packages");
-                    // }
+                    if (!VN_IS(nodep->packagep(), Class) && !VN_IS(nodep->packagep(), Package)) {
+                        cpackagerefp->v3error(
+                            "'::' expected to reference a class/package but referenced "
+                            << nodep->packagep()->prettyTypeName() << endl
+                            << cpackagerefp->warnMore() + "... Suggest '.' instead of '::'");
+                    }
                 }
             } else {
                 cpackagep->v3warn(E_UNSUPPORTED,
diff --git a/test_regress/t/t_class_mod_bad.out b/test_regress/t/t_class_mod_bad.out
new file mode 100644
index 000000000..8a24ba164
--- /dev/null
+++ b/test_regress/t/t_class_mod_bad.out
@@ -0,0 +1,5 @@
+%Error: t/t_class_mod_bad.v:21:7: '::' expected to reference a class/package but referenced MODULE 'M'
+                                : ... Suggest '.' instead of '::'
+   21 |       M::Cls p;
+      |       ^
+%Error: Exiting due to
diff --git a/test_regress/t/t_class_mod_bad.pl b/test_regress/t/t_class_mod_bad.pl
new file mode 100755
index 000000000..7be596e0f
--- /dev/null
+++ b/test_regress/t/t_class_mod_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_mod_bad.v b/test_regress/t/t_class_mod_bad.v
new file mode 100644
index 000000000..05194f7a6
--- /dev/null
+++ b/test_regress/t/t_class_mod_bad.v
@@ -0,0 +1,25 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+// verilator lint_off MULTITOP
+
+module M;
+class Cls;
+   function string name;
+      return $sformatf("m %m");
+   endfunction
+endclass
+endmodule
+
+module t (/*AUTOARG*/);
+   string s;
+
+   initial begin
+      M::Cls p;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule