diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 4ab4dc76c..1f1ba4428 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -1551,9 +1551,11 @@ private:
 		bool hiArray = nodep->exprp()->dtypep()->skipRefp()->castUnpackArrayDType();
 		bool loArray = nodep->modVarp()->dtypep()->skipRefp()->castUnpackArrayDType();
 		if (loArray != hiArray) {
-		    nodep->v3error("Illegal port connection "<<nodep->prettyName()<<","
-				   <<" port is"<<(hiArray?"":" not")<<" an array"
-				   <<" expression is"<<(loArray?"":" not")<<" an array.");
+		    nodep->v3error("Illegal port connection '"<<nodep->prettyName()<<"',"
+				   <<" mismatch between port which is"<<(hiArray?"":" not")<<" an array,"
+				   <<" and expression which is"<<(loArray?"":" not")<<" an array.");
+		    UINFO(1,"    Related lo: "<<nodep->exprp()->dtypep()->skipRefp()<<endl);
+		    UINFO(1,"    Related hi: "<<nodep->modVarp()->dtypep()->skipRefp()<<endl);
 		}
 		if (inputPin) {
 		    // input pin is lhs, expr is rhs; resize expr to match
diff --git a/test_regress/t/t_inst_misarray_bad.pl b/test_regress/t/t_inst_misarray_bad.pl
index 0e42a8435..c5001a755 100755
--- a/test_regress/t/t_inst_misarray_bad.pl
+++ b/test_regress/t/t_inst_misarray_bad.pl
@@ -11,7 +11,7 @@ compile (
 	 verilator_flags2 => ["--lint-only"],
 	 fails=>1,
 	 expect=>
-'%Error: t/t_inst_misarray_bad.v:\d+: Illegal port connection foo, port is not an array expression is an array.
+'%Error: t/t_inst_misarray_bad.v:\d+: Illegal port connection \'foo\', mismatch between port which is not an array, and expression which is an array.
 %Error: Exiting due to.*',
 	 );