diff --git a/bin/verilator b/bin/verilator
index a94b7fe56..b79d0c29c 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -487,6 +487,7 @@ detailed descriptions of these arguments.
     --runtime-debug             Enable model runtime debugging
     --savable                   Enable model save-restore
     --sc                        Create SystemC output
+    --sched-zero-delay          Specify #0 delay support
     --no-skip-identical         Disable skipping identical output
     --stats                     Create statistics file
     --stats-vars                Provide statistics on variables
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index d9900899b..6b9e3640d 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -1594,6 +1594,21 @@ Summary:
 
    Specifies SystemC output mode; see also :vlopt:`--cc` option.
 
+.. option:: --sched-zero-delay
+
+   Specifies if the generated code should support ``#0`` delays with full IEEE
+   1800 standard scheduling semantics. Full ``#0`` support has a simulation
+   performance cost. If :vlopt:`--sched-zero-delay` is used, the generated code
+   will fully support ``#0`` delays. If :vlopt:`--no-sched-zero-delay` is used,
+   the generated code will not support ``#0` delays, and simulation will fail
+   at runtime if a ``#0`` delay is executed. If no option is given, Verilator
+   will generate code with proper ``#0`` support if the input contains either a
+   ``#0``, or a ``#(expression)`` with a delay value unknown at compile time.
+
+   Option :vlopt:`--no-sched-zero-delay` can be used if the input contains
+   ``#0`` delays, but they are known to be not executed at runtime. This can
+   improve simulation performance.
+
 .. option:: --skip-identical
 
 .. option:: --no-skip-identical
diff --git a/docs/guide/languages.rst b/docs/guide/languages.rst
index 6dd41879b..262a58271 100644
--- a/docs/guide/languages.rst
+++ b/docs/guide/languages.rst
@@ -121,11 +121,6 @@ as well as all flavors of ``fork``.
 Compiling a Verilated design that uses these features requires a compiler
 with C++20 coroutine support, e.g. Clang 5, GCC 10, or newer.
 
-``#0`` delays cause Verilator to issue the :option:`ZERODLY` warning, as
-they work differently than described in the LRM. They do not schedule
-process resumption in the Inactive region, though the process will get
-resumed in the same time slot.
-
 Rising/falling/turn-off delays are currently unsupported and cause the
 :option:`RISEFALLDLY` warning.
 
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 8c7ba7a80..6e750d97a 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -2592,6 +2592,21 @@ List Of Warnings
 
 .. option:: ZERODLY
 
+   Since version 5.046:
+
+   Issued if neither :vlopt:`--sched-zero-delay`, nor
+   :vlopt:`--sched-zero-delay` is used on the command line, and the input does
+   not contain a compile time known ``#0`` delay, but does contain a
+   ``#(expressin)`` where the delay value cannot be determined at compile time.
+   Passing :vlopt:`--no-sched-zero-delay` can improve runtime performance if
+   variable delays are all known to be non-zero at runtime.
+
+   Also issued if :vlopt:`--no-sched-zero-delay` is used on the command line,
+   but the input contains a compile time known ``#0`` delay. This is safe to
+   ignore if the reported delay is known to be not executed at runtime.
+
+   Before version 5.046:
+
    Warns that `#0` delays do not schedule the process to be resumed in the
    Inactive region. Such processes do get resumed in the same time slot
    somewhere in the Active region. Issued only if Verilator is run with the