From 6d3ec160e138ce36aa35be28ee0e3946ff4dbb56 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 28 Mar 2021 20:30:22 -0400 Subject: [PATCH] Internal coverage improvements --- test_regress/t/t_lint_rsvd_bad.out | 34 ++++++++++++++++++++++++++++-- test_regress/t/t_lint_rsvd_bad.v | 8 +++++++ test_regress/t/t_sys_sformat.v | 9 ++++++++ 3 files changed, 49 insertions(+), 2 deletions(-) diff --git a/test_regress/t/t_lint_rsvd_bad.out b/test_regress/t/t_lint_rsvd_bad.out index e1200e595..c2fd258da 100644 --- a/test_regress/t/t_lint_rsvd_bad.out +++ b/test_regress/t/t_lint_rsvd_bad.out @@ -4,7 +4,37 @@ %Error: t/t_lint_rsvd_bad.v:7:8: syntax error, unexpected IDENTIFIER 7 | config cfgBad; | ^~~~~~ -%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:8:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig' - 8 | endconfig +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:8:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design' + 8 | design rtlLib.top; + | ^~~~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:9:12: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist' + 9 | default liblist rtlLib; + | ^~~~~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:4: Unsupported: Verilog 2001-config reserved word not implemented: 'instance' + 10 | instance top.a2 liblist gateLib; + | ^~~~~~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:20: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist' + 10 | instance top.a2 liblist gateLib; + | ^~~~~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:11:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include' + 11 | include none; + | ^~~~~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:12:4: Unsupported: Verilog 2001-config reserved word not implemented: 'library' + 12 | library rtlLib *.v; + | ^~~~~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:13:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include' + 13 | include aa; + | ^~~~~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:14:4: Unsupported: Verilog 2001-config reserved word not implemented: 'use' + 14 | use gateLib; + | ^~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:4: Unsupported: Verilog 2001-config reserved word not implemented: 'cell' + 15 | cell rtlLib.cell; + | ^~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:16: Unsupported: Verilog 2001-config reserved word not implemented: 'cell' + 15 | cell rtlLib.cell; + | ^~~~ +%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:16:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig' + 16 | endconfig | ^~~~~~~~~ %Error: Exiting due to diff --git a/test_regress/t/t_lint_rsvd_bad.v b/test_regress/t/t_lint_rsvd_bad.v index 7fc2f16c5..aaef81658 100644 --- a/test_regress/t/t_lint_rsvd_bad.v +++ b/test_regress/t/t_lint_rsvd_bad.v @@ -5,6 +5,14 @@ // SPDX-License-Identifier: CC0-1.0 config cfgBad; + design rtlLib.top; + default liblist rtlLib; + instance top.a2 liblist gateLib; + include none; + library rtlLib *.v; + include aa; + use gateLib; + cell rtlLib.cell; endconfig module t; diff --git a/test_regress/t/t_sys_sformat.v b/test_regress/t/t_sys_sformat.v index bce43cb5e..2e3443e5b 100644 --- a/test_regress/t/t_sys_sformat.v +++ b/test_regress/t/t_sys_sformat.v @@ -74,6 +74,15 @@ module t; $sformat(ochar,"%s","c"); if (ochar != "c") $stop; + $swrite(str2, 4'd12); + if (str2 != "12") $stop; + $swriteb(str2, 4'd12); + if (str2 != "1100") $stop; + $swriteh(str2, 4'd12); + if (str2 != "c") $stop; + $swriteo(str2, 4'd12); + if (str2 != "14") $stop; + $write("*-* All Finished *-*\n"); $finish; end