From 6789d247e2ff83746e1eca514f1b4a0d4861833e Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 23 Aug 2016 18:05:29 -0400 Subject: [PATCH] Fix SystemC compiles with VPI, bug1081. --- Changes | 2 ++ bin/verilator | 10 +++++----- include/verilated.mk.in | 14 +++----------- include/verilated_vpi.cpp | 3 +++ test_regress/t/t_vpi_sc.cpp | 13 +++++++++++++ test_regress/t/t_vpi_sc.pl | 22 ++++++++++++++++++++++ test_regress/t/t_vpi_sc.v | 18 ++++++++++++++++++ 7 files changed, 66 insertions(+), 16 deletions(-) create mode 100644 test_regress/t/t_vpi_sc.cpp create mode 100755 test_regress/t/t_vpi_sc.pl create mode 100644 test_regress/t/t_vpi_sc.v diff --git a/Changes b/Changes index 4aa448c75..5ff7557ed 100644 --- a/Changes +++ b/Changes @@ -6,6 +6,8 @@ indicates the contributor was also the author of the fix; Thanks! * Verilator 3.887 devel +**** Fix SystemC compiles with VPI, bug1081. [Arthur Kahlich] + * Verilator 3.886 2016-07-30 diff --git a/bin/verilator b/bin/verilator index bbb85027b..0ed247dde 100755 --- a/bin/verilator +++ b/bin/verilator @@ -1353,8 +1353,7 @@ section below for descriptions of some of the files that were created. We then can compile it - cd obj_dir - make -j -f Vour.mk Vour + make -j -C obj_dir -f Vour.mk Vour (Verilator included a default compile rule and link rule, since we used --exe and passed a .cpp file on the Verilator command line. You can also @@ -1362,7 +1361,6 @@ write your own compile rules, as we'll show in the SYSTEMC section.) And now we run it - cd .. obj_dir/Vour And we get as output @@ -1371,8 +1369,9 @@ And we get as output - our.v:2: Verilog $finish Really, you're better off writing a Makefile to do all this for you. Then, -when your source changes it will automatically run all of these steps. See -the test_c directory in the distribution for an example. +when your source changes it will automatically run all of these steps; to +aid this Verilator can create a makefile dependency file. See the test_c +directory in the distribution for an example. =head1 EXAMPLE SYSTEMC EXECUTION @@ -1416,6 +1415,7 @@ Now we run Verilator on our little example. We then can compile it + cd obj_dir make -j -f Vour.mk Vour__ALL.a make -j -f Vour.mk ../sc_main.o verilated.o diff --git a/include/verilated.mk.in b/include/verilated.mk.in index e9d94f0a6..4dfc8e6f1 100644 --- a/include/verilated.mk.in +++ b/include/verilated.mk.in @@ -43,8 +43,9 @@ VK_CPPFLAGS_ALWAYS += \ -I$(VERILATOR_ROOT)/include \ -I$(VERILATOR_ROOT)/include/vltstd \ -DVL_PRINTF=printf \ - -DVM_TRACE=$(VM_TRACE) \ -DVM_COVERAGE=$(VM_COVERAGE) \ + -DVM_SC=$(VM_SC) \ + -DVM_TRACE=$(VM_TRACE) \ $(CFG_CXXFLAGS_NO_UNUSED) \ ifeq ($(CFG_WITH_CCWARN),yes) # Local... Else don't burden users @@ -123,19 +124,10 @@ else preproc: endif -####################################################################### -##### SystemC w/o SystemPerl builds - -ifeq ($(VM_SC),1) - LIBS += -lm -lstdc++ -endif - ####################################################################### ##### C/H builds -ifeq ($(VM_PCLI),1) - LIBS += -lm -lstdc++ -endif +LIBS += -lm -lstdc++ ####################################################################### # Overall Objects Linking diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp index f06f10688..5dec85fe3 100644 --- a/include/verilated_vpi.cpp +++ b/include/verilated_vpi.cpp @@ -26,6 +26,9 @@ //========================================================================= +#if VM_SC +# include "verilated_sc.h" +#endif #include "verilated.h" #include "verilated_vpi.h" diff --git a/test_regress/t/t_vpi_sc.cpp b/test_regress/t/t_vpi_sc.cpp new file mode 100644 index 000000000..99ef5b08b --- /dev/null +++ b/test_regress/t/t_vpi_sc.cpp @@ -0,0 +1,13 @@ +// -*- mode: C++; c-file-style: "cc-mode" -*- + +#include "Vt_vpi_sc.h" + +VM_PREFIX* tb = NULL; + +int sc_main(int argc, char *argv[]) { + tb = new VM_PREFIX("tb"); + + VL_PRINTF("*-* All Finished *-*\n"); + tb->final(); + return 0; +} diff --git a/test_regress/t/t_vpi_sc.pl b/test_regress/t/t_vpi_sc.pl new file mode 100755 index 000000000..13d5edfd0 --- /dev/null +++ b/test_regress/t/t_vpi_sc.pl @@ -0,0 +1,22 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2010 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +compile ( + # Must not make shell/main or hides bug + make_top_shell => 0, + make_main => 0, + verilator_flags2 => ["--exe --vpi --sc $Self->{t_dir}/t_vpi_sc.cpp"], +); + +execute ( + check_finished=>1 +); + +ok(1); +1; diff --git a/test_regress/t/t_vpi_sc.v b/test_regress/t/t_vpi_sc.v new file mode 100644 index 000000000..99e6af81f --- /dev/null +++ b/test_regress/t/t_vpi_sc.v @@ -0,0 +1,18 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// Copyright 2010 by Wilson Snyder. This program is free software; you can +// redistribute it and/or modify it under the terms of either the GNU +// Lesser General Public License Version 3 or the Perl Artistic License +// Version 2.0. + +module t; + + // bug1081 - We don't use VPI, just need SC with VPI + + initial begin + $write("%0t: Hello\n", $time); + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule : t