diff --git a/Changes b/Changes
index e28a62b48..137d996aa 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
 
 ****  Fix $urandom_range passed variable (#2563). [nanduraj1]
 
+****  Fix method calls to package class functions (#2565). [Peter Monsson]
+
 
 * Verilator 4.100 2020-09-07
 
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 02e3ca90b..1bcfaad59 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2554,6 +2554,7 @@ private:
         UASSERT_OBJ(first_classp, nodep, "Unlinked");
         for (AstClass* classp = first_classp; classp;) {
             if (AstNodeFTask* ftaskp = VN_CAST(classp->findMember(nodep->name()), NodeFTask)) {
+                userIterate(ftaskp, nullptr);
                 nodep->taskp(ftaskp);
                 nodep->dtypeFrom(ftaskp);
                 if (VN_IS(ftaskp, Task)) nodep->makeStatement();
diff --git a/test_regress/t/t_convert2string.pl b/test_regress/t/t_convert2string.pl
new file mode 100755
index 000000000..89a4e77d9
--- /dev/null
+++ b/test_regress/t/t_convert2string.pl
@@ -0,0 +1,20 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_convert2string.v b/test_regress/t/t_convert2string.v
new file mode 100644
index 000000000..990dfd2fc
--- /dev/null
+++ b/test_regress/t/t_convert2string.v
@@ -0,0 +1,73 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2020 by Peter Monsson.
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+
+   input clk;
+   integer cyc; initial cyc=1;
+   wire [31:0] in = cyc;
+
+   Test test (/*AUTOINST*/
+              // Inputs
+              .clk                      (clk),
+              .in                       (in[31:0]));
+
+
+   always @ (posedge clk) begin
+      if (cyc!=0) begin
+         cyc <= cyc + 1;
+         if (cyc==10) begin
+            $write("*-* All Finished *-*\n");
+            $finish;
+         end
+      end
+   end
+
+endmodule
+
+package lpcm_pkg;
+  class lpcm_tr;
+    int latency;
+    int sample;
+
+    function new();
+      latency = 0;
+      sample = 0;
+    endfunction
+
+    function string convert2string();
+      return $sformatf("sample=0x%0h latency=%0d", sample, latency);
+    endfunction
+  endclass
+endpackage
+
+//internal error happens when lpcm_pkg is not imported
+//import lpcm_pkg::*;
+
+module Test (/*AUTOARG*/
+   // Inputs
+   clk, in
+   );
+
+   input clk;
+   input [31:0] in;
+
+   initial begin
+      string s;
+      lpcm_pkg::lpcm_tr tr; // internal error happens when lpcm_pkg is not imported
+      tr = new();
+      tr.sample = 1;
+      tr.latency = 2;
+      s = tr.convert2string();
+      $display("hello %s", tr.convert2string());
+      if (s != "sample=0x1 latency=2") $stop;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule