From 6412aff82d5bc9efce67c309e2c54b3abf4d0ec0 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 27 Nov 2007 16:52:19 +0000 Subject: [PATCH] Version bump, commentary git-svn-id: file://localhost/svn/verilator/trunk/verilator@970 77ca24e4-aefa-0310-84f0-b9a241c72d87 --- Changes | 2 +- bin/verilator | 8 +++++--- src/config_build.h.in | 2 +- test_regress/driver.pl | 25 +++++++++++++++++++++++++ test_regress/t/t_for_count.v | 22 +++++++++++++++++++++- test_regress/t/t_trace_ena.pl | 1 + 6 files changed, 54 insertions(+), 6 deletions(-) diff --git a/Changes b/Changes index ebf56a9db..87f63d210 100644 --- a/Changes +++ b/Changes @@ -3,7 +3,7 @@ Revision history for Verilator The contributors that suggested a given feature are shown in []. [by ...] indicates the contributor was also the author of the fix; Thanks! -* Verilator 3.65**** +* Verilator 3.655 11/27/2007 *** Support "#delay ;" with associated STMTDLY warning. diff --git a/bin/verilator b/bin/verilator index cf482226d..7d5663a34 100755 --- a/bin/verilator +++ b/bin/verilator @@ -1980,7 +1980,7 @@ and may use more then 4GB, but about 1GB is the maximum typically needed. =item How do I generate waveforms (traces) in C++? -See the next question for SystemC mode. +See the next question for tracing in SystemC mode. Add the --trace switch to Verilator, and make sure the SystemPerl package is installed. SystemC itself does not need to be installed for C++ only @@ -1989,8 +1989,10 @@ the SystemPerl kit and point the SYSTEMPERL environment variable to the untarred directory. In your top level C code, call Verilated::traceEverOn(true). Then create a -SpTraceVcdC object. For an example, see the call to SpTraceVcdC in the -test_c/sc_main.cpp file of the distribution. +SpTraceVcdC object, and in your main loop call "trace_object->dump(time)" +every time step, and finally call "trace_object->close()". For an example, +see the call to SpTraceVcdC in the test_c/sim_main.cpp file of the +distribution. You also need to compile SpTraceVcdC.cpp and add it to your link. This is done for you if using the Verilator --exe flag. diff --git a/src/config_build.h.in b/src/config_build.h.in index 6d43abdae..74a73ba8d 100644 --- a/src/config_build.h.in +++ b/src/config_build.h.in @@ -24,7 +24,7 @@ //********************************************************************** //**** Version and host name -#define DTVERSION "Verilator 3.654 8/1/2007" +#define DTVERSION "Verilator 3.655 11/27/2007" //********************************************************************** //**** Functions diff --git a/test_regress/driver.pl b/test_regress/driver.pl index 8fa9ef735..6651c0a3d 100755 --- a/test_regress/driver.pl +++ b/test_regress/driver.pl @@ -560,6 +560,18 @@ sub _make_main { print $fh " topp->eval();\n"; $set = "topp->"; } + + my $traceit = ($self->{trace} && !$self->{sp} && !$self->{sc}); + if ($traceit) { + $fh->print("\n"); + $fh->print("#if VM_TRACE\n"); + $fh->print(" Verilated::traceEverOn(true);\n"); + $fh->print(" SpTraceVcdCFile* tfp = new SpTraceVcdCFile;\n"); + $fh->print(" topp->trace (tfp, 99);\n"); + $fh->print(" tfp->open (\"obj_dir/".$self->{name}."_simx.vcd\");\n"); + $fh->print("#endif\n"); + } + print $fh " ${set}fastclk = true;\n" if $self->{inputs}{fastclk}; print $fh " ${set}clk = true;\n" if $self->{inputs}{clk}; print $fh " while (sc_time_stamp() < sim_time && !Verilated::gotFinish()) {\n"; @@ -578,6 +590,11 @@ sub _make_main { } else { print $fh " main_time+=1;\n"; print $fh " ${set}eval();\n" if $action; + if ($traceit) { + $fh->print("#if VM_TRACE\n"); + $fh->print(" tfp->dump (main_time);\n"); + $fh->print("#endif //VM_TRACE\n"); + } } } print $fh " }\n"; @@ -586,6 +603,14 @@ sub _make_main { print $fh " }\n"; print $fh " topp->final();\n"; print $fh " SpCoverage::write(\"",$self->{coverage_filename},"\");\n" if $self->{coverage}; + + if ($traceit) { + $fh->print("#if VM_TRACE\n"); + $fh->print(" tfp->close();\n"); + $fh->print("#endif //VM_TRACE\n"); + } + $fh->print("\n"); + print $fh " delete topp; topp=NULL;\n"; print $fh " exit(0L);\n"; print $fh "}\n"; diff --git a/test_regress/t/t_for_count.v b/test_regress/t/t_for_count.v index 82459c528..663ab0c94 100644 --- a/test_regress/t/t_for_count.v +++ b/test_regress/t/t_for_count.v @@ -13,9 +13,9 @@ module t (/*AUTOARG*/ integer cyc; initial cyc=1; integer j; - integer hit_count; reg [63:0] cam_lookup_hit_vector; + integer hit_count; always @(/*AUTOSENSE*/cam_lookup_hit_vector) begin hit_count = 0; for (j=0; j < 64; j=j+1) begin @@ -23,6 +23,22 @@ module t (/*AUTOARG*/ end end + integer hit_count2; + always @(/*AUTOSENSE*/cam_lookup_hit_vector) begin + hit_count2 = 0; + for (j=63; j >= 0; j=j-1) begin + hit_count2 = hit_count2 + {31'h0, cam_lookup_hit_vector[j]}; + end + end + + integer hit_count3; + always @(/*AUTOSENSE*/cam_lookup_hit_vector) begin + hit_count3 = 0; + for (j=63; j > 0; j=j-1) begin + if (cam_lookup_hit_vector[j]) hit_count3 = hit_count3 + 32'd1; + end + end + reg [127:0] wide_for_index; reg [31:0] wide_for_count; always @(/*AUTOSENSE*/cam_lookup_hit_vector) begin @@ -64,10 +80,14 @@ module t (/*AUTOARG*/ end if (cyc==2) begin if (hit_count != 32'd2) $stop; + if (hit_count2 != 32'd2) $stop; + if (hit_count3 != 32'd2) $stop; cam_lookup_hit_vector <= 64'h01010010_00010001; end if (cyc==3) begin if (hit_count != 32'd5) $stop; + if (hit_count2 != 32'd5) $stop; + if (hit_count3 != 32'd4) $stop; if (wide_for_count != 32'h80) $stop; end if (cyc==9) begin diff --git a/test_regress/t/t_trace_ena.pl b/test_regress/t/t_trace_ena.pl index 0db8ef196..eca7e09e3 100755 --- a/test_regress/t/t_trace_ena.pl +++ b/test_regress/t/t_trace_ena.pl @@ -18,6 +18,7 @@ execute ( if ($Last_Self->{v3}) { file_grep ("obj_dir/Vt_trace_ena__Trace__Slow.cpp", qr/c_trace_on\"/x); file_grep_not ("obj_dir/Vt_trace_ena__Trace__Slow.cpp", qr/_trace_off\"/x); + file_grep ("obj_dir/t_trace_ena_simx.vcd", qr/\$enddefinitions/x); } ok(1);