diff --git a/bin/verilator b/bin/verilator
index 6f63af247..d01139750 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -4164,7 +4164,7 @@ trace file if you want all data to land in the same output file.
         ...
         Verilated::traceEverOn(true);
         VerilatedVcdC* tfp = new VerilatedVcdC;
-        topp->trace(tfp, 99);
+        topp->trace(tfp, 99);  // Trace 99 levels of hierarchy
         tfp->open("obj_dir/t_trace_ena_cc/simx.vcd");
         ...
         while (sc_time_stamp() < sim_time && !Verilated::gotFinish()) {
@@ -4200,7 +4200,7 @@ trace file if you want all data to land in the same output file.
         ...
         Verilated::traceEverOn(true);
         VerilatedVcdSc* tfp = new VerilatedVcdSc;
-        topp->trace(tfp, 99);
+        topp->trace(tfp, 99);  // Trace 99 levels of hierarchy
         tfp->open("obj_dir/t_trace_ena_cc/simx.vcd");
         ...
         sc_start(1);
diff --git a/examples/tracing_sc/sc_main.cpp b/examples/tracing_sc/sc_main.cpp
index 676c3ec13..078025909 100644
--- a/examples/tracing_sc/sc_main.cpp
+++ b/examples/tracing_sc/sc_main.cpp
@@ -95,7 +95,7 @@ int sc_main(int argc, char* argv[]) {
     if (flag && 0==strcmp(flag, "+trace")) {
         cout << "Enabling waves into logs/vlt_dump.vcd...\n";
         tfp = new VerilatedVcdSc;
-        top->trace(tfp, 99);
+        top->trace(tfp, 99);  // Trace 99 levels of hierarchy
         Verilated::mkdir("logs");
         tfp->open("logs/vlt_dump.vcd");
     }