diff --git a/test_regress/driver.pl b/test_regress/driver.pl
index 7e727f716..266872399 100755
--- a/test_regress/driver.pl
+++ b/test_regress/driver.pl
@@ -117,7 +117,7 @@ if ($#opt_tests<0) {
 mkdir "obj_dir";
 
 our $Log_Filename = "obj_dir/driver_".strftime("%Y%m%d_%H%M%S.log", localtime);
-my $leftcnt=0; my $okcnt=0; my $failcnt=0; my $skcnt=0;
+my $LeftCnt=0; my $OkCnt=0; my $FailCnt=0; my $SkipCnt=0; my $UnsupCnt=0;
 my @fails;
 
 foreach my $testpl (@opt_tests) {
@@ -134,7 +134,7 @@ $Fork->wait_all();   # Wait for all children to finish
 sub one_test {
     my @params = @_;
     my %params = (@params);
-    $leftcnt++;
+    $LeftCnt++;
     $Fork->schedule
 	(
 	 test_pl_filename => $params{pl_filename},
@@ -150,6 +150,8 @@ sub one_test {
 		 $test->oprint("Test PASSED\n");
 	     } elsif ($test->skips && !$test->errors) {
 		 $test->oprint("%Skip: $test->{skips}\n");
+	     } elsif ($test->unsupporteds && !$test->errors) {
+		 $test->oprint("%Unsupported: $test->{unsupporteds}\n");
 	     } else {
 		 $test->error("Missing ok\n") if !$test->errors;
 		 $test->oprint("%Error: $test->{errors}\n");
@@ -160,16 +162,18 @@ sub one_test {
 	     my $test = VTest->new(@params);
 	     $test->read_status;
 	     if ($test->ok) {
-		 $okcnt++;
+		 $OkCnt++;
 	     } elsif ($test->skips && !$test->errors) {
-		 $skcnt++;
+		 $SkipCnt++;
+	     } elsif ($test->unsupporteds && !$test->errors) {
+		 $UnsupCnt++;
 	     } else {
 		 $test->oprint("FAILED: ","*"x60,"\n");
 		 push @fails, "\t#".$test->soprint("%Error: $test->{errors}\n");
 		 my $j = ($opt_jobs>1?" -j":"");
 		 push @fails, "\t\tmake$j && test_regress/"
 		     .$test->{pl_filename}." ".join(' ',@Orig_ARGV_Sw)."\n";
-		 $failcnt++;
+		 $FailCnt++;
 		 report(\@fails, $Log_Filename);
 		 my $other = "";
 		 foreach my $proc ($Fork->running) {
@@ -178,8 +182,8 @@ sub one_test {
 		 $test->oprint("Simultaneous running tests:",$other,"\n") if $other;
 		 if ($opt_stop) { die "%Error: --stop and errors found\n"; }
 	     }
-	     $leftcnt--;
-	     print STDERR "==SUMMARY: Left $leftcnt  Passed $okcnt  Skipped $skcnt  Failed $failcnt\n";
+	     $LeftCnt--;
+	     print STDERR "==SUMMARY: Left $LeftCnt  Passed $OkCnt  Unsup $UnsupCnt  Skipped $SkipCnt  Failed $FailCnt\n";
 	 },
 	 )->ready();
 }
@@ -187,7 +191,7 @@ sub one_test {
 report(\@fails, undef);
 report(\@fails, $Log_Filename);
 
-exit(10) if $failcnt;
+exit(10) if $FailCnt;
 
 #----------------------------------------------------------------------
 
@@ -248,13 +252,13 @@ sub report {
     my $delta = time() - $Start;
     $fh->print("\n");
     $fh->print("="x70,"\n");
-    $fh->printf("TESTS Passed $okcnt  Skipped $skcnt  Failed $failcnt  Time %d:%02d\n",
+    $fh->printf("TESTS Passed $OkCnt  Unsup $UnsupCnt  Skipped $SkipCnt  Failed $FailCnt  Time %d:%02d\n",
 	       int($delta/60),$delta%60);
     foreach my $f (@$fails) {
 	chomp $f;
 	$fh->print("$f\n");
     }
-    $fh->printf("TESTS Passed $okcnt  Skipped $skcnt  Failed $failcnt  Time %d:%02d\n",
+    $fh->printf("TESTS Passed $OkCnt  Unsup $UnsupCnt  Skipped $SkipCnt  Failed $FailCnt  Time %d:%02d\n",
 	       int($delta/60),$delta%60);
 }
 
@@ -412,6 +416,13 @@ sub skip {
     $self->{skips} ||= "Skip: ".$msg;
 }
 
+sub unsupported {
+    my $self = shift;
+    my $msg = join('',@_);
+    warn "%Unsupported: $self->{mode}/$self->{name}: ".$msg."\n";
+    $self->{unsupporteds} ||= "Unsupported: ".$msg;
+}
+
 sub prep {
     my $self = shift;
     mkdir $self->{obj_dir};  # Ok if already exists
@@ -453,7 +464,7 @@ sub read_status {
 sub compile_vlt_flags {
     my $self = (ref $_[0]? shift : $Self);
     my %param = (%{$self}, @_);	   # Default arguments are from $self
-    return 1 if $self->errors || $self->skips;
+    return 1 if $self->errors || $self->skips || $self->unsupporteds;
 
     my $checkflags = join(' ',@{$param{v_flags}},
 			  @{$param{v_flags2}},
@@ -500,7 +511,7 @@ sub compile_vlt_flags {
 sub compile {
     my $self = (ref $_[0]? shift : $Self);
     my %param = (%{$self}, @_);	   # Default arguments are from $self
-    return 1 if $self->errors || $self->skips;
+    return 1 if $self->errors || $self->skips || $self->unsupporteds;
     $self->oprint("Compile\n");
 
     compile_vlt_flags(%param);
@@ -617,7 +628,7 @@ sub compile {
 		    fails=>$param{fails},
 		    expect=>$param{expect},
 		    cmd=>\@cmdargs);
-	return 1 if $self->errors || $self->skips;
+	return 1 if $self->errors || $self->skips || $self->unsupporteds;
 
 	if (!$param{fails} && $param{verilator_make_gcc}) {
 	    if ($self->sp) {
@@ -645,7 +656,7 @@ sub compile {
 
 sub execute {
     my $self = (ref $_[0]? shift : $Self);
-    return 1 if $self->errors || $self->skips;
+    return 1 if $self->errors || $self->skips || $self->unsupporteds;
     my %param = (%{$self}, @_);	   # Default arguments are from $self
     #   params may be expect or {tool}_expect
     $self->oprint("Run\n");
@@ -732,7 +743,7 @@ sub execute {
 
 sub inline_checks {
     my $self = (ref $_[0]? shift : $Self);
-    return 1 if $self->errors || $self->skips;
+    return 1 if $self->errors || $self->skips || $self->unsupporteds;
     return 1 if !$self->{vlt};
 
     my %param = (%{$self}, @_);	   # Default arguments are from $self
@@ -777,7 +788,7 @@ sub inline_checks {
 sub ok {
     my $self = (ref $_[0]? shift : $Self);
     $self->{ok} = $_[0] if defined $_[0];
-    $self->{ok} = 0 if $self->{errors} || $self->{skips};
+    $self->{ok} = 0 if $self->{errors} || $self->{skips} || $self->unsupporteds;
     return $self->{ok};
 }
 
@@ -791,6 +802,11 @@ sub skips {
     return $self->{skips};
 }
 
+sub unsupporteds {
+    my $self = (ref $_[0]? shift : $Self);
+    return $self->{unsupporteds};
+}
+
 sub top_filename {
     my $self = (ref $_[0]? shift : $Self);
     $self->{top_filename} = shift if defined $_[0];
@@ -871,7 +887,7 @@ sub _run {
     if ($param{fails} && !$status) {
 	$self->error("Exec of $param{cmd}[0] ok, but expected to fail\n");
     }
-    return if $self->errors || $self->skips;
+    return if $self->errors || $self->skips || $self->unsupporteds;
 
     # Read the log file a couple of times to allow for NFS delays
     if ($param{check_finished} || $param{expect}) {
@@ -1344,7 +1360,7 @@ sub file_grep_not {
     my $self = (ref $_[0]? shift : $Self);
     my $filename = shift;
     my $regexp = shift;
-    return if $self->errors || $self->skips;
+    return if $self->errors || $self->skips || $self->unsupporteds;
 
     my $contents = $self->file_contents($filename);
     return if ($contents eq "_Already_Errored_");
@@ -1357,7 +1373,7 @@ sub file_grep {
     my $self = (ref $_[0]? shift : $Self);
     my $filename = shift;
     my $regexp = shift;
-    return if $self->errors || $self->skips;
+    return if $self->errors || $self->skips || $self->unsupporteds;
 
     my $contents = $self->file_contents($filename);
     return if ($contents eq "_Already_Errored_");
@@ -1445,7 +1461,11 @@ driver.pl - Run regression tests
 
 =head1 DESCRIPTION
 
-driver.pl invokes Verilator or another simulator on each little test file.
+driver.pl invokes Verilator or another simulator on each test file.
+
+The driver reports the number of tests which pass, fail, skipped (some
+resource required by the test is not available, such as SystemC), or are
+unsupported (buggy or require a feature change before will pass.)
 
 =head1 ARGUMENTS
 
diff --git a/test_regress/t/t_array_packed_sysfunct.pl b/test_regress/t/t_array_packed_sysfunct.pl
index f83806a29..ccdc5bb87 100755
--- a/test_regress/t/t_array_packed_sysfunct.pl
+++ b/test_regress/t/t_array_packed_sysfunct.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug448");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug448");
 
 compile (
 	 );
diff --git a/test_regress/t/t_array_packed_value_list.pl b/test_regress/t/t_array_packed_value_list.pl
index 2f21be6f8..8b6510320 100755
--- a/test_regress/t/t_array_packed_value_list.pl
+++ b/test_regress/t/t_array_packed_value_list.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug355");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug355");
 
 compile (
 	 );
diff --git a/test_regress/t/t_array_packed_write_read.pl b/test_regress/t/t_array_packed_write_read.pl
index 74cef8faf..fe649af5b 100755
--- a/test_regress/t/t_array_packed_write_read.pl
+++ b/test_regress/t/t_array_packed_write_read.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug446");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug446");
 
 compile (
 	 );
diff --git a/test_regress/t/t_bind.pl b/test_regress/t/t_bind.pl
new file mode 100755
index 000000000..87dfe1002
--- /dev/null
+++ b/test_regress/t/t_bind.pl
@@ -0,0 +1,20 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2004 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bind");
+
+compile (
+	 );
+
+execute (
+	 check_finished=>1,
+     );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_bind.v b/test_regress/t/t_bind.v
new file mode 100644
index 000000000..7b8935db9
--- /dev/null
+++ b/test_regress/t/t_bind.v
@@ -0,0 +1,57 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2012 by Wilson Snyder.
+
+module t;
+   wire [31:0] o;
+   wire        si = 1'b0;
+
+   ExampInst i
+     (// Outputs
+      .o	(o[31:0]),
+      // Inputs
+      .i	(1'b0)
+      /*AUTOINST*/);
+
+   Prog p (/*AUTOINST*/
+	   // Inputs
+	   .si				(si));
+
+endmodule
+
+module InstModule (
+   output logic [31:0] so,
+   input 	 si
+   );
+   assign so = {32{si}};
+endmodule
+
+program Prog (input si);
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endprogram
+
+module ExampInst (o,i);
+   output logic [31:0] o;
+   input  i;
+
+   InstModule instName
+     (// Outputs
+      .so	(o[31:0]),
+      // Inputs
+      .si	(i)
+      /*AUTOINST*/);
+
+   //bind InstModule Prog instProg
+   //    (.si(si));
+
+   // Note is based on context of caller
+   bind InstModule Prog instProg
+     (/*AUTOBIND*/
+      .si      (si));
+
+endmodule
+
diff --git a/test_regress/t/t_enumeration.pl b/test_regress/t/t_enumeration.pl
index 92e2f5596..6d5abb42b 100755
--- a/test_regress/t/t_enumeration.pl
+++ b/test_regress/t/t_enumeration.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug460");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug460");
 
 compile (
 	 );
diff --git a/test_regress/t/t_gen_div0.pl b/test_regress/t/t_gen_div0.pl
new file mode 100755
index 000000000..8e8fcfb3e
--- /dev/null
+++ b/test_regress/t/t_gen_div0.pl
@@ -0,0 +1,20 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug470");
+
+compile (
+	 );
+
+execute (
+	 check_finished=>1,
+     );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_gen_div0.v b/test_regress/t/t_gen_div0.v
new file mode 100644
index 000000000..62cf0e068
--- /dev/null
+++ b/test_regress/t/t_gen_div0.v
@@ -0,0 +1,34 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2012 by Wilson Snyder.
+
+module t (/*AUTOINST*/);
+
+   Test #(
+          .BIT_WIDTH   (72),
+          .BYTE_WIDTH  (9)
+          )
+
+   u_test_inst();
+
+endmodule
+
+module Test ();
+
+   parameter BIT_WIDTH   = "";
+   parameter BYTE_WIDTH  = "";
+
+   localparam BYTES = BIT_WIDTH / BYTE_WIDTH;
+
+   wire [BYTES - 1:0] i;
+   wire [BYTES - 1:0] o;
+
+   genvar g;
+   generate
+      for (g = 0; g < BYTES; g = g + 1) begin: gen
+           assign o[g] = (i[g] !== 1'b0);
+        end
+   endgenerate
+endmodule
+
diff --git a/test_regress/t/t_genvar_misuse_bad.pl b/test_regress/t/t_genvar_misuse_bad.pl
index 157752980..38624e801 100755
--- a/test_regress/t/t_genvar_misuse_bad.pl
+++ b/test_regress/t/t_genvar_misuse_bad.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug408");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug408");
 
 compile (
 	 v_flags2 => ["--lint-only"],
diff --git a/test_regress/t/t_structure_packed_sysfunct.pl b/test_regress/t/t_structure_packed_sysfunct.pl
index e6361ac39..43179dd12 100755
--- a/test_regress/t/t_structure_packed_sysfunct.pl
+++ b/test_regress/t/t_structure_packed_sysfunct.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug181");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug181");
 
 compile (
 	 );
diff --git a/test_regress/t/t_structure_packed_value_list.pl b/test_regress/t/t_structure_packed_value_list.pl
index 2f21be6f8..8b6510320 100755
--- a/test_regress/t/t_structure_packed_value_list.pl
+++ b/test_regress/t/t_structure_packed_value_list.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug355");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug355");
 
 compile (
 	 );
diff --git a/test_regress/t/t_structure_packed_write_read.pl b/test_regress/t/t_structure_packed_write_read.pl
index e6361ac39..43179dd12 100755
--- a/test_regress/t/t_structure_packed_write_read.pl
+++ b/test_regress/t/t_structure_packed_write_read.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug181");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug181");
 
 compile (
 	 );
diff --git a/test_regress/t/t_sv_bus_mux_demux.pl b/test_regress/t/t_sv_bus_mux_demux.pl
index e6361ac39..43179dd12 100755
--- a/test_regress/t/t_sv_bus_mux_demux.pl
+++ b/test_regress/t/t_sv_bus_mux_demux.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug181");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug181");
 
 compile (
 	 );
diff --git a/test_regress/t/t_tri_pull01.pl b/test_regress/t/t_tri_pull01.pl
index d631005d2..702b95e91 100755
--- a/test_regress/t/t_tri_pull01.pl
+++ b/test_regress/t/t_tri_pull01.pl
@@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 
-$Self->{vlt} and $Self->skip("Verilator unsupported, bug462");
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, bug462");
 
 compile (
 	 );
diff --git a/test_regress/t/t_tri_pull2_bad.pl b/test_regress/t/t_tri_pull2_bad.pl
new file mode 100755
index 000000000..6227d0bde
--- /dev/null
+++ b/test_regress/t/t_tri_pull2_bad.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, tri");
+
+compile (
+	 fails=>$Self->{v3},
+	 expect=>
+'%Error: t/t_tri_bad_pull2.v:19: Unsupported: Conflicting pull directions.
+%Error: t/t_tri_bad_pull2.v:9: ... Location of conflicing pull.
+%Error: Exiting due to',
+	 ) if 
+
+ok(1);
+1;
+
diff --git a/test_regress/t/t_tri_pull2_bad.v b/test_regress/t/t_tri_pull2_bad.v
new file mode 100644
index 000000000..4bb328f84
--- /dev/null
+++ b/test_regress/t/t_tri_pull2_bad.v
@@ -0,0 +1,21 @@
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2010 by Lane Brooks.
+
+module t (clk);
+   input clk;
+
+   wire  A;
+   
+   pullup p1(A);
+
+   child child(/*AUTOINST*/
+	       // Inouts
+	       .A			(A));
+   
+endmodule
+
+module child(inout A);
+
+   pulldown p2(A);
+
+endmodule
diff --git a/test_regress/t/t_tri_pull_bad.pl b/test_regress/t/t_tri_pull_bad.pl
new file mode 100755
index 000000000..4779e9af9
--- /dev/null
+++ b/test_regress/t/t_tri_pull_bad.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, tri");
+
+compile (
+	 fails=>$Self->{v3},
+	 expect=>
+'%Error: t/t_tri_bad_pull.v:9: Unsupported: Conflicting pull directions.
+%Error: t/t_tri_bad_pull.v:10: ... Location of conflicing pull.
+%Error: Exiting due to',
+	 ) if 
+
+ok(1);
+1;
+
diff --git a/test_regress/t/t_tri_pull_bad.v b/test_regress/t/t_tri_pull_bad.v
new file mode 100644
index 000000000..08ce012a1
--- /dev/null
+++ b/test_regress/t/t_tri_pull_bad.v
@@ -0,0 +1,12 @@
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2010 by Lane Brooks.
+
+module t (clk);
+   input clk;
+
+   wire  A;
+   
+   pullup p1(A);
+   pulldown p2(A);
+
+endmodule
diff --git a/test_regress/t/t_tri_various.pl b/test_regress/t/t_tri_various.pl
new file mode 100755
index 000000000..6fe5bf47c
--- /dev/null
+++ b/test_regress/t/t_tri_various.pl
@@ -0,0 +1,14 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+
+$Self->{vlt} and $Self->unsupported("Verilator unsupported, tri");
+
+compile (
+    );
+
+execute (
+	 check_finished=>1,
+     );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_tri_various.v b/test_regress/t/t_tri_various.v
new file mode 100644
index 000000000..41b3a21fd
--- /dev/null
+++ b/test_regress/t/t_tri_various.v
@@ -0,0 +1,157 @@
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2008 by Lane Brooks
+
+module t (clk);
+   input clk;
+
+   reg [31:0] state;  initial state=0;
+
+   wire A = state[0];
+   wire OE = state[1];
+   wire Z1, Z2, Z3, Z4, Z5, Z6, Z7, Z8, Z9;
+   
+   Test1 test1(/*AUTOINST*/
+	       // Inouts
+	       .Z1			(Z1),
+	       // Inputs
+	       .OE			(OE),
+	       .A			(A));
+
+   Test2 test2(/*AUTOINST*/
+	       // Inouts
+	       .Z2			(Z2),
+	       // Inputs
+	       .OE			(OE),
+	       .A			(A));
+
+   Test3 test3(/*AUTOINST*/
+	       // Inouts
+	       .Z3			(Z3),
+	       // Inputs
+	       .OE			(OE),
+	       .A			(A));
+
+   Test4 test4(/*AUTOINST*/
+	       // Outputs
+	       .Z4			(Z4),
+	       // Inouts
+	       .Z5			(Z5));
+
+   Test5 test5(/*AUTOINST*/
+	       // Inouts
+	       .Z6			(Z6),
+	       .Z7			(Z7),
+	       .Z8			(Z8),
+	       .Z9			(Z9),
+	       // Inputs
+	       .OE			(OE));
+   
+   
+   always @(posedge clk) begin
+      state <= state + 1;
+`ifdef TEST_VERBOSE
+      $display(" Z1=%b 2=%b 3=%b 4=%b 5=%b 6=%b 7=%b 8=%b 9=%b",Z1,Z2,Z3,Z4,Z5,Z6,Z7,Z8,Z9);
+`endif
+
+      if(state == 0) begin
+	 if(Z1 !== 1'b1) $stop;  // tests pullups
+	 if(Z2 !== 1'b1) $stop;
+	 if(Z3 !== 1'b1) $stop;
+	 if(Z4 !== 1'b1) $stop;
+	 if(Z5 !== 1'b1) $stop;
+	 if(Z6 !== 1'b1) $stop;
+	 if(Z7 !== 1'b0) $stop;
+	 if(Z8 !== 1'b0) $stop;
+	 if(Z9 !== 1'b1) $stop;
+      end 
+      else if(state == 1) begin
+	 if(Z1 !== 1'b1) $stop;  // tests pullup
+	 if(Z2 !== 1'b1) $stop;
+	 if(Z3 !== 1'b1) $stop;
+	 if(Z4 !== 1'b1) $stop;
+	 if(Z5 !== 1'b1) $stop;
+	 if(Z6 !== 1'b1) $stop;
+	 if(Z7 !== 1'b0) $stop;
+	 if(Z8 !== 1'b0) $stop;
+	 if(Z9 !== 1'b1) $stop;
+      end
+      else if(state == 2) begin
+	 if(Z1 !== 1'b0) $stop; // tests output driver low
+	 if(Z2 !== 1'b0) $stop;
+	 //if(Z3 !== 1'b1) $stop;   // "X"
+	 if(Z4 !== 1'b1) $stop;
+	 if(Z5 !== 1'b1) $stop;
+	 if(Z6 !== 1'b0) $stop;
+	 if(Z7 !== 1'b1) $stop;
+	 if(Z8 !== 1'b1) $stop;
+	 if(Z9 !== 1'b0) $stop;
+      end
+      else if(state == 3) begin
+	 if(Z1 !== 1'b1) $stop; // tests output driver high
+	 if(Z2 !== 1'b1) $stop;
+	 if(Z3 !== 1'b1) $stop;
+	 if(Z4 !== 1'b1) $stop;
+	 if(Z5 !== 1'b1) $stop;
+	 if(Z6 !== 1'b0) $stop;
+	 if(Z7 !== 1'b1) $stop;
+	 if(Z8 !== 1'b1) $stop;
+	 if(Z9 !== 1'b0) $stop;
+      end 
+      else if(state == 4) begin
+	 $write("*-* All Finished *-*\n");
+	 $finish;
+      end
+   end
+   pullup(Z1);
+   pullup(Z2);
+   pullup(Z3);
+   pullup(Z4);
+   pullup(Z5);
+   pullup(Z6);
+   pulldown(Z7);
+   pullup(Z8);
+   pulldown(Z9);
+endmodule
+
+
+module Test1(input OE, input A, inout Z1);
+   assign Z1 = (OE) ? A : 1'bz;
+endmodule
+
+module Test2(input OE, input A, inout Z2);
+   assign Z2 = (OE) ? A : 1'bz;
+endmodule
+
+
+// mixed low-Z and tristate
+module Test3(input OE, input A, inout Z3);
+   assign Z3 = (OE) ? A : 1'bz;
+   assign Z3 = 1'b1;
+endmodule
+
+
+// floating output and inout
+module Test4(output Z4, inout Z5);
+endmodule
+
+
+// AND gate tristates
+module Test5(input OE, inout Z6, inout Z7, inout Z8, inout Z9);
+   assign Z6 = (OE) ? 1'b0 : 1'bz;
+   assign Z7 = (OE) ? 1'b1 : 1'bz;
+   assign Z8 = (OE) ? 1'bz : 1'b0;
+   assign Z9 = (OE) ? 1'bz : 1'b1;
+endmodule
+
+
+// This is not implemented yet
+//module Test3(input OE, input A, inout Z3);
+//   always @(*) begin
+//      if(OE) begin
+//	 Z3 = A;
+//      end else begin
+//	 Z3 = 1'bz;
+//      end
+//   end
+//endmodule
+