From 48597bebaf9528dca522c67d6d37dab0ead72654 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 15 Oct 2020 20:44:51 -0400 Subject: [PATCH] Tests: Better static tests --- test_regress/t/t_class_static.out | 9 ++++ test_regress/t/t_class_static.pl | 23 +++++++++ test_regress/t/t_class_static.v | 71 +++++++++++++++++++++++++++ test_regress/t/t_var_static.v | 50 ++++++++++--------- test_regress/t/t_var_static_param.out | 5 ++ test_regress/t/t_var_static_param.pl | 23 +++++++++ test_regress/t/t_var_static_param.v | 34 +++++++++++++ 7 files changed, 191 insertions(+), 24 deletions(-) create mode 100644 test_regress/t/t_class_static.out create mode 100755 test_regress/t/t_class_static.pl create mode 100644 test_regress/t/t_class_static.v create mode 100644 test_regress/t/t_var_static_param.out create mode 100755 test_regress/t/t_var_static_param.pl create mode 100644 test_regress/t/t_var_static_param.v diff --git a/test_regress/t/t_class_static.out b/test_regress/t/t_class_static.out new file mode 100644 index 000000000..678029a0e --- /dev/null +++ b/test_regress/t/t_class_static.out @@ -0,0 +1,9 @@ +%Error-UNSUPPORTED: t/t_class_static.v:12:15: Unsupported: 'static' class members + : ... In instance t + 12 | static int c_st = 2; + | ^~~~ +%Error-UNSUPPORTED: t/t_class_static.v:25:18: Unsupported: 'static' function/task variables + : ... In instance t + 25 | static int st = 2; st++; return st; + | ^~ +%Error: Exiting due to diff --git a/test_regress/t/t_class_static.pl b/test_regress/t/t_class_static.pl new file mode 100755 index 000000000..1befb2521 --- /dev/null +++ b/test_regress/t/t_class_static.pl @@ -0,0 +1,23 @@ +#!/usr/bin/env perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(simulator => 1); + +compile( + expect_filename => $Self->{golden_filename}, + fails => $Self->{vlt_all} # Verilator unsupported, bug546 + ); + +#execute( +# check_finished => 1, +# ); + +ok(1); +1; diff --git a/test_regress/t/t_class_static.v b/test_regress/t/t_class_static.v new file mode 100644 index 000000000..ffb92c2d5 --- /dev/null +++ b/test_regress/t/t_class_static.v @@ -0,0 +1,71 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2014 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0); + +class Cls; + int c_no = 2; + //automatic int c_au = 2; // automatic not a legal keyword here + static int c_st = 2; + + function int f_c_no (); + ++c_no; return c_no; + endfunction + function int f_c_st (); + ++c_st; return c_st; + endfunction + + function int f_no_no (); + int au = 2; au++; return au; + endfunction + function int f_no_st (); + static int st = 2; st++; return st; + endfunction + function int f_no_au (); + automatic int au = 2; au++; return au; + endfunction +endclass + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk; + + Cls a = new; + Cls b = new; + + int v; + + initial begin + v = a.f_c_no(); `checkh(v,3); + v = a.f_c_no(); `checkh(v, 4); + v = b.f_c_no(); `checkh(v, 3); + v = b.f_c_no(); `checkh(v, 4); + v = a.f_c_st(); `checkh(v,3); + v = a.f_c_st(); `checkh(v, 4); + v = b.f_c_st(); `checkh(v, 5); + v = b.f_c_st(); `checkh(v, 6); + // + v = a.f_no_no(); `checkh(v, 3); + v = a.f_no_no(); `checkh(v, 3); + v = b.f_no_no(); `checkh(v, 3); + v = b.f_no_no(); `checkh(v, 3); + v = a.f_no_st(); `checkh(v, 3); + v = a.f_no_st(); `checkh(v, 4); + v = b.f_no_st(); `checkh(v, 5); + v = b.f_no_st(); `checkh(v, 6); + v = a.f_no_au(); `checkh(v, 3); + v = a.f_no_au(); `checkh(v, 3); + v = b.f_no_au(); `checkh(v, 3); + v = b.f_no_au(); `checkh(v, 3); + + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule diff --git a/test_regress/t/t_var_static.v b/test_regress/t/t_var_static.v index 67f772591..8dbc698ff 100644 --- a/test_regress/t/t_var_static.v +++ b/test_regress/t/t_var_static.v @@ -43,27 +43,29 @@ module t (/*AUTOARG*/ automatic int au = 2; au++; return au; endfunction + int v; + initial begin - `checkh(f_no_no(), 3); - `checkh(f_no_no(), 4); - `checkh(f_no_st(), 3); - `checkh(f_no_st(), 4); - `checkh(f_no_au(), 3); - `checkh(f_no_au(), 3); + v = f_no_no(); `checkh(v, 3); + v = f_no_no(); `checkh(v, 4); + v = f_no_st(); `checkh(v, 3); + v = f_no_st(); `checkh(v, 4); + v = f_no_au(); `checkh(v, 3); + v = f_no_au(); `checkh(v, 3); // - `checkh(f_st_no(), 3); - `checkh(f_st_no(), 4); - `checkh(f_st_st(), 3); - `checkh(f_st_st(), 4); - `checkh(f_st_au(), 3); - `checkh(f_st_au(), 3); + v = f_st_no(); `checkh(v, 3); + v = f_st_no(); `checkh(v, 4); + v = f_st_st(); `checkh(v, 3); + v = f_st_st(); `checkh(v, 4); + v = f_st_au(); `checkh(v, 3); + v = f_st_au(); `checkh(v, 3); // - `checkh(f_au_no(), 3); - `checkh(f_au_no(), 3); - `checkh(f_au_st(), 3); - `checkh(f_au_st(), 4); - `checkh(f_au_au(), 3); - `checkh(f_au_au(), 3); + v = f_au_no(); `checkh(v, 3); + v = f_au_no(); `checkh(v, 3); + v = f_au_st(); `checkh(v, 3); + v = f_au_st(); `checkh(v, 4); + v = f_au_au(); `checkh(v, 3); + v = f_au_au(); `checkh(v, 3); // end @@ -78,17 +80,17 @@ module t (/*AUTOARG*/ ist1 = 10; ist2 = 20; iau3 = 30; - `checkh(ist1, 10); - `checkh(ist2, 20); - `checkh(iau3, 30); + v = ist1; `checkh(v, 10); + v = ist2; `checkh(v, 20); + v = iau3; `checkh(v, 30); ++ist1; ++ist2; ++iau3; end else if (cyc == 1) begin - `checkh(ist1, 11); - `checkh(ist2, 21); - `checkh(iau3, 0); + v = ist1; `checkh(v, 11); + v = ist2; `checkh(v, 21); + //TODO v = iau3; `checkh(v, 0); end else if (cyc == 5) begin $write("*-* All Finished *-*\n"); diff --git a/test_regress/t/t_var_static_param.out b/test_regress/t/t_var_static_param.out new file mode 100644 index 000000000..f58144faa --- /dev/null +++ b/test_regress/t/t_var_static_param.out @@ -0,0 +1,5 @@ +%Error-UNSUPPORTED: t/t_var_static_param.v:32:18: Unsupported: 'static' function/task variables + : ... In instance t.subb + 32 | static int st = 2; st += P; return st; + | ^~ +%Error: Exiting due to diff --git a/test_regress/t/t_var_static_param.pl b/test_regress/t/t_var_static_param.pl new file mode 100755 index 000000000..1befb2521 --- /dev/null +++ b/test_regress/t/t_var_static_param.pl @@ -0,0 +1,23 @@ +#!/usr/bin/env perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(simulator => 1); + +compile( + expect_filename => $Self->{golden_filename}, + fails => $Self->{vlt_all} # Verilator unsupported, bug546 + ); + +#execute( +# check_finished => 1, +# ); + +ok(1); +1; diff --git a/test_regress/t/t_var_static_param.v b/test_regress/t/t_var_static_param.v new file mode 100644 index 000000000..89f381d98 --- /dev/null +++ b/test_regress/t/t_var_static_param.v @@ -0,0 +1,34 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0) + +module t (/*AUTOARG*/); + + sub #(.P(1)) suba (); + sub #(.P(10)) subb (); + + int v; + + initial begin + v = suba.f_no_st(); `checkh(v, 3); + v = suba.f_no_st(); `checkh(v, 4); + v = subb.f_no_st(); `checkh(v, 'hc); + v = subb.f_no_st(); `checkh(v, 'h16); + v = suba.f_no_st(); `checkh(v, 5); + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule + +module sub; + parameter P = 1; + function int f_no_st (); + // This static is unique within each parameterized module + static int st = 2; st += P; return st; + endfunction +endmodule